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T810 数据表(PDF) 5 Page - STMicroelectronics

部件名 T810
功能描述  Snubberless?? logic level and standard 8 A Triacs
PDF  12 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

T810 数据表(HTML) 5 Page - STMicroelectronics

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BTA08, BTB08 and T8 Series
Characteristics
Doc ID 7472 Rev 7
5/12
Figure 7.
Non-repetitive surge peak on-state
current for a sinusoidal
Figure 8.
Relative variation of gate trigger
current
0.01
0.10
1.00
10.00
10
100
1000
I
(A), I t (A s)
TSM
22
t (ms)
p
T initial=25°C
j
ITSM
dI/dt limitation:
50A/µs
I t
2
pulse with width t < 10 ms and corresponding value of I t
p
2
360°
α
-40
-20
0
20
40
60
80
100
120
140
0.0
0.5
1.0
1.5
2.0
2.5
T (°C)
j
I,I ,I [T ] /
GTHL
j
I
,I ,I [T =25°C]
GTHL
j
IGT
IH & IL
holding current and latching current
versus junction temperature (typical values)
Figure 9.
Relative variation of critical rate of
decrease of main current versus
(dV/dt)c (typical values)
Figure 10.
Relative variation of critical rate of
decrease of main current versus
(dV/dt)c (typical values)
0.1
1.0
10.0
100.0
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
2.2
(dV/dt)c (V/µs)
(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c
TW
T835/CW/BW
T810/SW
Snubberless and Logic level types
0.1
1.0
10.0
100.0
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
2.0
(dV/dt)c (V/µs)
(dI/dt)c [(dV/dt)c] / Specified (dI/dt)c
C
B
Standard types
Figure 11.
Relative variation of critical rate of
decrease of main current versus
junction temperature
Figure 12.
DPAK and D2PAK thermal resistance
junction to ambient versus copper
surface under tab
0
25
50
75
100
125
0
1
2
3
4
5
6
(dI/dt)c [T ] /
pecified]
j
(dI/dt)c [T s
j
T (°C)
j
0
4
8
1216202428323640
0
10
20
30
40
50
60
70
80
90
100
S(cm²)
R
(°C/W)
th(j-a)
DPAK
2
DPAK
printed circuit board FR4, copper thickness: 35 µm



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