M48Z2M1Y, M48Z2M1V

Description

Doc ID 5135 Rev 5

5/20

1

Description

organized as 2,097,152 words by 8 bits. The device combines two internal lithium batteries,

CMOS SRAMs and a control circuit in a plastic 36-pin DIP, long module.

The ZEROPOWER RAM replaces industry standard SRAMs. It provides the non-volatility of

PROMs without any requirement for special WRITE timing or limitations on the number of

WRITEs that can be performed.

Figure 1.

Logic diagram

Table 1.

Signal names

A0-A20

Address inputs

DQ0-DQ7

Data inputs / outputs

E

Chip enable

G

Output enable

W

WRITE enable

Supply voltage

Ground

NC

Not connected internally

AI02048

21

A0-A20

W

DQ0-DQ7

VCC

M48Z2M1Y

M48Z2M1V

G

VSS

8

E