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STV8162D 数据表(PDF) 5 Page - STMicroelectronics

部件名 STV8162D
功能描述  5 V, 5 V and 8 V triple voltage regulator with disable and reset functions
PDF  14 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

STV8162D 数据表(HTML) 5 Page - STMicroelectronics

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Obsolete
Product(s)
- Obsolete
Product(s)
STV8162
Electrical characteristics
5/14
VOUT1LI
Line regulation
7 V < VIN1 < 12 V,
IOUT1 = 200 mA
50
mV
VOUT2LI
Line regulation
7 V < VIN2 < 12 V,
IOUT2 = 200 mA
50
mV
VOUT3LI
Line regulation
10 V < VIN3 < 15 V,
IOUT3 = 200 mA
80
mV
VOUT1LO Load regulation
5 mA < IOUT1 < 600 mA
100
mV
VOUT2LO Load regulation
5 mA < IOUT2 < 600 mA
100
mV
VOUT3LO Load regulation
5 mA < IOUT3 < 600 mA
160
mV
IQ
Quiescent current
IOUT1 = 10 mA
Outputs 2 and 3 disabled
2.2
3.0
mA
VO1RST
Reset threshold voltage
K = VOUT1
K-0.4
K-0.25
K-0.10 V
VRTH
Reset threshold hysteresis
See circuit description.
30
75
120
mV
tRD
Reset pulse delay
Ce = 100 nF
See circuit description.
25
ms
VRL
Saturation voltage in reset
condition
IRESET = 5 mA
0.4
V
IRH
Leakage current in normal
condition, at RESET pin
VRESET = 10 V
10
μA
KOUT1
KOUT2
KOUT3
Output voltage thermal drift
TJ = 0 to 125°C
100
ppm/°
C
IOUT1SC
Short circuit output current
VIN1 = 7 V
0.8
1.3
1.8
A
IOUT2SC
Short circuit output current
VIN1 = 7 V
0.8
1.3
1.8
A
IOUT3SC
Short circuit output current
VIN3 = 10 V
0.8
1.3
1.8
A
VDISH
Voltage high level at DISABLE pin (Outputs 2 and 3 active)
2
V
VDISL
Voltage low level at DISABLE pin (Outputs 2 and 3 disabled)
0.8
V
IDIS
Bias current at DISABLE pin
0 V < VDISABLE < 7 V
-100
2
μA
TJSD
Junction temperature for thermal shutdown
150
°C
TSDH
Thermal shutdown temperature hysteresis
15
°C
Table 4.
Electrical characteristics (continued)
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
K
OUT
ΔV
OUT
10
6
ΔTV
OUT
-----------------------------------
=



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