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MX613 数据表(PDF) 2 Page - CML Microcircuits |
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MX613 数据表(HTML) 2 Page - CML Microcircuits |
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2 / 10 page ![]() © 1997 MX •COM Inc. www.mxcom.com Tele: 800 638-5577 910 744-5050 Fax: 910 744-5054 Doc. # 20480086.003 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USAAll trademarks and service marks are held by their respective companies Global Call Progress Tone Detector 2 MX613 Preliminary Information Xtal/Clock: The input to the on-chip clock oscillator inverter. A 3.579545MHz Xtal or externally derived telephone system clock (f XTAL) should be connected here. Operation of the MX613 without a suitable Xtal/Clock input may cause device damage. Xtal: The output of the on-chip clock oscillator inverter. See Figure 2. No internal connection. V BIAS: The internal circuitry bias line, held at VDD/2 this pin must be decoupled to VSS. Level In: The input for level discrimination. This input is internally biased to V BIAS. Signals must be a.c. coupled, and the audio signal must be fed to both this pin and the Signal In pin. Correct level detection determines the operation of this device (see Principles of Decoder Operation). But if you wish to disregard the amplitude of the input levels, the MX613 may be permanently enabled by pulling this pin to V DD and disabled by pulling to V SS. Signal In: The input for frequency discrimination and decoding. This input is internally biased to V BIAS. Signals must be a.c. coupled. The audio signal must be fed to both this pin and the Level In pin. No internal connection. V SS: Signal ground (GND). No internal connection. No internal connection. IRQ: This Interrupt Request output from the MX613 is ‘wire-OR able’ allowing the interrupt outputs of other peripherals to be combined and connected to the Interrupt input of aµProcessor. This input has a low-impedance pulldown to V SS when active and a high- impedance when inactive. An interrupt is produced on completion of a HI or LO frequency measurement. Serial Clock: The serial clock from the µProcessor. Data Out is clocked into the µProcessor on the rising edge of the Serial Clock. See Data-Read Timing diagram. Chip Select: A logic “0” at this input will select this device. Data Out: The serial data output. Under the control of the Chip Select and Serial Clock inputs, data should be read from this output in 6-bit blocks MSB (Bit-5) first. If 8 serial clock pulses are applied, two additional logic “0s” will be output after Bit-0. No internal connection. V DD: Positive supply input. A single, stable supply is required. Levels and voltages within the MX613 are dependent upon this supply. This pin should be decoupled to V SS by a capacitor located close to the MX613 pins. Pin Number Function MX613DW 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 MX613P 1 2 3 4 5 6 7 8 9 10 11 12 13 14 |
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