Baseband Signal Processor

FX829

© 1997 Consumer Microcircuits Limited

22

D/829/4

(c)

Subsequent bytes of Tx data should be written to the TXDATA register as soon as the

TXDATAF bit has been set to”1”. After the last byte of Tx data has been loaded, the

TXDATAF bit will be set after both 8 and 16 FFSK bit-periods followed by the TXIDLEF bit

which will be set approximately one FFSK bit-period later, to indicate that the final bit has

been transmitted.

(d) The TXDATAF bit will continue to be set every 8 FFSK bit-periods, regardless of whether Tx

data is written to the TXDATA register or not, providing the transmitter is enabled (FFSK Tx

mode = FFSKTX bit set to “1”). Note that whilst the 2-byte checksum is being generated and

transmitted, the TXDATAF bit will not be set for approximately 24 FFSK bit-periods.