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数据搜索系统，热门电子元器件搜索 |
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FX919AD2 数据表(PDF) 21 Page - CML Microcircuits |
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FX919AD2 数据表(HTML) 21 Page - CML Microcircuits |
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21 / 44 page  4-Level FSK Modem Data Pump FX919A © 1996 Consumer Microcircuits Limited 21 D/919A/4 t3 t3 t3 Modem Rx input Symbols to De-interleave circuit Data from Data Block Buffer Task to Command Register for task #1 for task #2 for task #3 1 2 3 1 2 3 t6 t6 t6 t7 t7 t7 BFREE bit Figure 11 Receive Task Timing Diagram Task Time (symbol times) t3 Time to receive all symbols of task SFS 24 (minimum) SFSH 90 (minimum) RHB/RILB 66 R4S 4 t6 Maximum time between first symbol of task SFS 21 entering the de-interleave circuit and the SFSH 21 task being written to modem. RHB/RILB 49 R4S 3 t7 Maximum time from the last bit of the task Any 1 entering the de-interleave circuit to BFREE going to a logic '1' (high) |
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