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8535F–SEEPR–6/10

Atmel AT25320B/640B

3.

Functional Description

of the 6805 and 68HC11 series of microcontrollers.

The AT25320B/640B utilizes an 8-bit instruction register. The list of instructions and their operation codes are con-

tained in Table 3-1. All instructions, addresses, and data are transferred with the MSB first and start with a high-to-

low CS transition.

WRITE ENABLE (WREN): The device will power up in the write disable state when V

ming instructions must therefore be preceded by a Write Enable instruction.

WRITE DISABLE (WRDI): To protect the device against inadvertent writes, the Write Disable instruction disables

all programming modes. The WRDI instruction is independent of the status of the WP pin.

READ STATUS REGISTER (RDSR): The Read Status Register instruction provides access to the status register.

The READY/BUSY and Write Enable status of the device can be determined by the RDSR instruction. Similarly,

the Block Write Protection Bits indicate the extent of protection employed. These bits are set by using the WRSR

instruction.

Table 3-1.

Instruction Set for the Atmel AT25320B/640B

Instruction Name

Instruction Format

Operation

WREN

0000 X110

Set Write Enable Latch

WRDI

0000 X100

Reset Write Enable Latch

RDSR

0000 X101

Read Status Register

WRSR

0000 X001

Write Status Register

READ

0000 X011

Read Data from Memory Array

WRITE

0000 X010

Write Data to Memory Array

Table 3-2.

Status Register Format

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

WPEN

X

X

X

BP1

BP0

WEN

RDY

Table 3-3.

Read Status Register Bit Definition

Bit

Definition

Bit0(RDY)

Bit 0 = “0” (RDY) indicates the device is READY. Bit 0 = “1” indicates the write cycle

is in progress.

Bit 1 (WEN)

Bit 1= “0” indicates the device is not WRITE ENABLED. Bit 1 = “1” indicates the

device is write enabled.

Bit 2 (BP0)

See Table 3-4 on page 8.

Bit 3 (BP1)

See Table 3-4 on page 8.

Bits 4–6 are “0”s when device is not in an internal write cycle.

Bit 7 (WPEN)

See Table 3-5 on page 8.

Bits 0–7 are “1”s during an internal write cycle.