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STTS751 数据表(PDF) 20 Page - STMicroelectronics |
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STTS751 数据表(HTML) 20 Page - STMicroelectronics |
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20 / 36 page ![]() STTS751 register summary STTS751 20/36 Doc ID 16483 Rev 5 4.9 Therm limit The Therm limit is a read/write register located at address 20h. The power-on default value is 85 °C (55h). The format is 8-bit, two's complement integer. This is the same format as the upper byte of the temperature register (Section 4.2: Temperature register format). Whenever the temperature exceeds the value of the therm limit, the Addr/Therm output will be asserted (low). See Section 6 for more information. 4.10 Therm hysteresis The Therm hysteresis values controls the hysteresis for Addr/Therm output. Once Therm output has asserted, it will not de-assert until the temperature has fallen below the respective therm limit minus the therm hysteresis value. See Section 5 for more information. The therm hysteresis register is read/write and is located at address 21h. The power-up default value is 10 °C (0Ah). The format is 8-bit, two's complement integer. 4.11 SMBus timeout register At power-up, the STTS751 is configured with an SMBus timeout of 25 to 35 milliseconds (tTIMEOUT). See Section 3.7 for more information. TIMEOUT: [bit 7] 1: SMBus timeout is enabled. Default condition. 0: SMBus timeout is disabled. [bits 6:0] Not used - reserved. Table 20. Therm limit ADDR (hex) R/W Register b7 b6 b5 b4 b3 b2 b1 b0 Power-up default (hex) 20 R/W Therm sign 64 °C 32 °C 16 °C 8 °C 4 °C 2 °C 1 °C 55 (85 °C, dec) Table 21. Therm hysteresis ADDR (hex) R/W Register b7 b6 b5 b4 b3 b2 b1 b0 Power-up default (hex) 21 R/W Therm hysteresis sign 64 °C 32 °C 16 °C 8 °C 4 °C 2 °C 1 °C 0A (10 °C, dec) Table 22. SMBus timeout register ADDR (hex) R/W Register b7 b6 b5 b4 b3 b2 b1 b0 Power-up default (hex) 22 R/W SMBus timeout TIMEOUT 0 0 0 0 0 0 0 80 |
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