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AD623ARMZ 数据表(PDF) 12 Page - Analog Devices |
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AD623ARMZ 数据表(HTML) 12 Page - Analog Devices |
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12 / 24 page  AD623 Rev. D | Page 12 of 24 10 8 6 4 2 0 020 VS = ±5V VS = ±2.5V 40 60 80 100 FREQUENCY (kHz) Figure 27. Large Signal Response, G ≤ 10 1k 100 10 1 1 10 100 1k GAIN (V/V) Figure 28. Settling Time to 0.01% vs. Gain, for a 5 V Step at Output, CL = 100 pF, VS = ±5 V 500µV 1V 20µs Figure 29. Large Signal Pulse Response and Settling Time, G = −1 (0.250 mV = 0.01%), CL = 100 pF 500µV 1V 10µs Figure 30. Large Signal Pulse Response and Settling Time, G = −10 (0.250 mV = 0.01%), CL = 100 pF 10mV 2V 50µs Figure 31. Large Signal Pulse Response and Settling Time, G = 100, CL = 100 pF 20mV 2V 500µs Figure 32. Large Signal Pulse Response and Settling Time, G = −1000 (5 mV = 0.01%), CL = 100 pF |
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