R1LP0108ESF-5SIS0 datasheet(10/17 Pages) RENESAS

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R1LP0108E Series

R10DS0029EJ0200

Rev.2.00

Page 10 of 15

2011.01.14

Write Cycle

R1LP0108E**-5S*

R1LP0108E**-7S*

Parameter

Symbol

Min.

Max.

Min.

Max.

Unit

Note

Write cycle time

tWC

Address valid to end of write

tAW

Chip select to end of write

tCW

Write pulse width

tWP

Address setup time

tAS

Write recovery time

tWR

Data to write time overlap

tDW

Data hold from write time

tDH

Output enable from end of write

tOW

Output disable to output in high-Z

tOHZ

1,2

Write to output in high-Z

tWHZ

1,2

Note

1. tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit conditions and are not

referred to output voltage levels.

2. This parameter is sampled and not 100% tested.

3. At any given temperature and voltage condition, tHZ max is less than tLZ min both for a given device and from

device to device.

4. A write occurs during the overlap of a low CS1#, a high CS2, a low WE#.

A write begins at the latest transition among CS1# going low, CS2 going high and WE# going low.

A write ends at the earliest transition among CS1# going high, CS2 going low and WE# going high.

tWP is measured from the beginning of write to the end of write.

5. tCW is measured from the later of CS1# going low or CS2 going high to end of write.

6. tAS is measured the address valid to the beginning of write.

7. tWR is measured from the earliest of CS1# or WE# going high or CS2 going low to the end of write cycle.

8. Don’t apply inverted phase signal externally when DQ pin is output mode.

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