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LS7084N 数据表(PDF) 3 Page - LSI Computer Systems |
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LS7084N 数据表(HTML) 3 Page - LSI Computer Systems |
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3 / 4 page ![]() 7083N/84N-121206-3 The information included herein is believed to be accurate and reliable. However, LSI Computer Systems, Inc. assumes no responsibilities for inaccuracies, nor for any infringements of patent rights of others which may result from its use. CLOCK AND DIRECTION DECODE DUAL ONE-SHOT DUAL ONE-SHOT CURRENT MIRROR FILTER FILTER A B MODE V DD VSS MUX x4 CLOCK x1 CLOCK UP/DN 8 7 UPCK or CLK DNCK or UP/DN 1 4 5 6 2 3 FIGURE 3. LS7083N/LS7084N BLOCK DIAGRAM RBIAS +V -V x2 CLOCK FORWARD REVERSE TPW TOW TPS TDS 2 4 1 4 2 2 4 1 4 2 2 4 1 4 2 2 4 1 4 2 A B UPCLK (7083N) DNCLK (7083N) CLK (7084N) UP/DN (7084N) TPS NOTE: Output clocks labeled 1, 2 and 4 have the following interpretations. 1. Generated in x1, x2 and x4 modes. 2. Generated in x2 and x4 modes only. 3. Generated in x4 mode only. FIGURE 2. LS7083N / LS7084N INPUT / OUTPUT TIMING |
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