PROGRAMMABLE DIGITAL DELAY TIMER

DESCRIPTION:

The

LS7211N and LS7212N are CMOS integrated circuits for

generating digitally programmable delays. The delay is con-

trolled by 8 binary weighted inputs, WB0 - WB7, in conjunction

with an applied clock or oscillator frequency. The programmed

time delay manifests itself in the Delay Output (OUT) as a func-

tion of the Operating Mode selected by the Mode Select inputs

A and B: One-Shot, Delayed Operate, Delayed Release or Dual

Delay. The time delay is initiated by a transition of the Trigger

Input (TRIG).

I/O DESCRIPTION:

MODE SELECT Inputs A & B (Pins 1 & 2)

The 4 operating modes are selected by Inputs A and B

according to Table 1

TABLE 1. MODE SELECTION

A

B

MODE

0

0

One-Shot (OS)

0

1

Delayed Operate (DO)

1

0

Delayed Release (DR)

1

1

Dual Delay (DD)

Each input has an internal pull-up resistor of about 500kΩ.

One-Shot Mode (OS)

A positive transition at the TRIG input causes OUT to switch

low without delay and starts the delay timer. At the end of the

programmed delay timeout, OUT switches high. If a delay time-

out is in progress when a positive transition occurs at the TRIG

input, the delay timer will be restarted. A negative transition at

the TRIG input has no effect.

Delayed Operate Mode (DO)

A positive transition at the TRIG input starts the delay timer. At

the end of the delay timeout, OUT switches low. A negative

transition at the TRIG input causes OUT to switch high without

delay. OUT is high when TRIG is low.

Delayed Release Mode (DR)

A negative transition at the TRIG input starts the delay tim-

er. At the end of the delay timeout, OUT switches high. A

postive transition at the TRIG input causes OUT to switch

low without delay. OUT is low when TRIG is high.

Dual Delay Mode (DD)

A positive or negative transition at the TRIG input starts

the delay timer. At the end of the delay timeout, OUT

switches to the logic state which is the inverse of the TRIG

input. If a delay timeout is in progress when a transition

occurs at the TRIG input, the delay timer is restarted.

7211N-07209-1

July 2009

LSI/CSI

LSI Computer Systems, Inc. 1235 Walt Whitman Road, Melville, NY 11747 (631) 271-0400 FAX (631) 271-0405

LS7211N-7212N

FEATURES:

• 8-bit programmable delay from microseconds to days

• On chip oscillator (RC or Crystal) or external clock time base

• Selectable prescaler for real time delay generation based

on 50Hz/60Hz time base or 32,768Hz watch crystal

• Four operating modes

• Reset input for delay abort

• Low quiescent and operating current

• Direct relay drive

•

LS7211N, LS7212N (DIP); LS7211N-S, LS7212N-S (SOIC)

-

See Figure 1 -

UL

®

A3800

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

A

B

TRIG

RC/CLOCK

PSCLS

RESET

WB0

WB1

WB2

WB3

WB4

WB5

WB6

WB7

OUT

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

OUT

A

B

TRIG

XTLI/CLOCK

XTLO

PSCLS

RESET

WB0

WB1

WB2

WB3

WB4

WB5

WB6

WB7

FIGURE 1

PIN ASSIGNMENT - TOP VIEW

RCS/CLKS