No. 5731-16/23

LC74788, 74788M, 74788JM

COMMAND7 (Display control setup command)

• First byte

DA

Register

Contents

Notes

0 to 7

State

Function

7

—

1

6

—

0

Command 7 identification code.

5

—

0

Display control setup.

4

—

1

3

—

0

Extended command 0 identification code

2

—

0

1

SEL1

0

Vertical synchronizing signal (external V separation) input

1

Frame signal input

Only valid when CTL3 is high.

0

CTL3

0

Use internal V separation

Switches V separation.

1

Do not use internal V separation

• Second byte

DA

Register

Contents

Notes

0 to 7

State

Function

7

—

0

Second byte identification bit

6

CINSEL

0

Blanking area (The logical OR of the character and frame signals)

1

Video signal display area

5

CINCTL

0

1

4

VNPSEL

0

V falling edge detection

Switches the V acquisition polarity in external mode

1

V rising edge detection

when internal V separation is used.

3

VSPSEL

0

VSEP: about 8.9 µs (for NTSC)

Switches the internal V separation period.

1

VSEP: about 17.8 µs (for NTSC)

2

MSKERS

0

Mask valid

Clears the HSYNC and VSYNC masks.

1

Mask invalid

1

MSKSEL

0

3H (for NTSC)

Switches the VSYNC mask.

1

20H (for NTSC)

0

EGL

0

Switches the frame level.

Note: All registers are set to 0 when the LC74786/M/JM is reset by the RST pin.