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CY2DM1502ZXCT 数据表(PDF) 4 Page - Cypress Semiconductor |
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CY2DM1502ZXCT 数据表(HTML) 4 Page - Cypress Semiconductor |
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4 / 12 page ![]() CY2DM1502 Document Number: 001-56315 Rev. *F Page 4 of 12 DC Electrical Specifications (VDD = 3.3 V ± 5% or 2.5 V ± 5%; TA = 0 °C to 70 °C (Commercial) or –40 °C to 85 °C (Industrial)) Parameter Description Condition Min Max Unit IDD Operating supply current All CML outputs floating (internal IDD)– 50 mA VIH Input high voltage, CML / LVPECL inputs IN and IN# –VDD + 0.3 V VIL Input low voltage, CML / LVPECL inputs IN and IN# –0.3 – V VID [3] Input differential amplitude See Figure 2 on page 6 0.4 1.0 V VICM Input common mode voltage See Figure 2 on page 6 0.5 VDD – 0.2 V IIH Input high current, CML / LVPECL inputs IN and IN# Input = VDD [4] – 150 μA IIL Input low current, CML / LVPECL inputs IN and IN# Input = VSS [4] –150 – μA VOH CML output high voltage Terminated with 50 Ω to V DD [5] VDD – 0.1 – V VOL CML output low voltage Terminated with 50 Ω to V DD [5] VDD – 0.7 VDD – 0.3 V CIN Input capacitance Measured at 10 MHz; per pin – 3 pF Notes 3. VID minimum of 400 mV is required to meet all output AC Electrical Specifications. The device is functional with VID minimum of greater than 200 mV. 4. Positive current flows into the input pin, negative current flows out of the input pin. 5. Refer to Figure 3 on page 6. [+] Feedback |
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