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Revision 1.0

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AS8650

Datasheet - Detailed Descr i p ti on

Figure 7. Power-up and Undervoltage Sequence

7.11 Reset Block

The reset block generates an external RESET signal to reset the microcontroller and all other external circuits. The reset functionality is

explained in Figure 8. The reset block consists of a digital buffer at the output. The RESET signal is affected by VLDO1_RESET (during

overload, reset on VLDO1) and watch dog output. All conditions which cause a drop of the VLDO1 voltage will be detected from the low voltage

reset unit which in-turn generates a reset signal.

Figure 8. Reset Block Functional Waveform

V5V_POKTH

V5V

V5V_POK_flag

V5V_UVTH

V5V_UV_flag

DCDC Supply

VLDO1_POKTH

VLDO1

VLDO1_RESET

VLDO1_UVTH

LDO1 Supply

VSUP_POR

VSUP_RESET

VSUP_UVTH

VSUP_POKTH

VSUP

VSUP_POR_RESET

VSUP_UV_flag

VSUP Supply

VSUP still falling

VSUP_POK_flag

VSUP recovering

VSUP recovering

VSUP still falling

VLDO3_POKTH

VLDO3

VLDO3_POK_flag

VLDO3_UVTH

VLDO3_UV_flag

LDO3 Supply

VLDO2_POKTH

VLDO2

VLDO2_POK_flag

VLDO2_UVTH

VLDO2_UV_flag

LDO2 Supply

VLDO1

VSUP

VLDO1_POR

RESET

Initialization

Thermal shutdown

Spike VSUP

Low voltage VSUP

Current limitation active

(Overload)

VLDO1_UV

MISSING

WATCHDOG

ACCESS