MIC502YN datasheet(9/15 Pages) MICREL

9 / 15 page

Micrel, Inc.

MIC502

November 2006

M9999-112206

Functional Description

Oscillator

A capacitor connected to CF determines the frequency

of the internal time base which drives the state-machine

logic and determines the PWM frequency. This operating

frequency will be typically 30Hz to 60Hz. (CF = 0.1µF for

30Hz.)

Pulse-Width Modulator

A triangle-wave generator and threshold detector

comprise the internal pulse-width modulator (PWM). The

PWM’s output duty-cycle is determined by the higher of

VT1 or VT2. A typical voltage range of 30% to 70% of VDD

applied to the V T1 and V T2 pins corresponds to 0% to

100% duty-cycle. Since at least one of the control

voltage inputs is generally from a thermistor-resistor

divider connected to VDD, the PWM out-put duty cycle

will not be affected by changes in the supply voltage.

Driver Output

OUT is a complementary push-pull digital output with

asymmetric drive (approximately 10mA source, 1mA

sink, see “Electrical Characteristics”). It is optimized for

directly driving an NPN transistor switch in the fan’s

ground-return. See “Applications Information” for circuit

details.

Shutdown/Reset

Internal circuitry automatically performs a reset of the

MIC502 when power is applied. The MIC502 may be

shut down at anytime by forcing VT1 below its VIL

threshold. This is typically accomplished by connecting

the VT1 pin to open-drain or open-collector logic and

results in an immediate and asynchronous shutdown of

the MIC502. The OUT and /OTF pins will float while V T1

is below VIL.

If V T1 then rises above VIH, a device reset occurs. Reset

is equivalent to a power-up condition: the state of /OTF

is cleared, a startup interval is triggered, and normal fan

operation begins.

Startup Interval

Any time the fan is started from the off state (power-on

or coming out of sleep mode or shutdown mode), the

PWM output is automatically forced high for a startup

interval of 64× tPWM. Once the startup interval is

complete, PWM operation will commence and the duty-

cycle of the output will be determined by the higher of

VT1 or VT2.

Overtemperature Fault Output

/OTF is an active-low, open-collector logic output. An

over-temperature condition will cause /OTF to be

asserted. An overtemperature condition is determined by

VT1 exceeding the normal operating range of 30% to

70% of VDD by > 7% of VDD. Note that VOT is guaranteed

by design to always be higher than VPWM(max).

Sleep Mode

When VT1 and VT2 fall below VSLP, the system is deemed

capable of operating without fan cooling and the MIC502

enters sleep mode and discontinues fan operation. The

threshold where the MIC502 enters sleep mode is deter-

mined by VSLP. Connecting the VSLP pin to ground

disables sleep mode.

Once in sleep mode, all device functions cease (/OTF in-

active, PWM output off) unless VT1 or VT2 rise above

VWAKE. (VWAKE = VSLP + VHYST). VHYST is a fixed amount of

hysteresis added to the sleep comparator which

prevents erratic operation around the VSLP operating

point. The result is stable and predictable thermostatic

action: whenever possible the fan is shut down to reduce

energy consumption and acoustic noise, but will always

be activated if the system temperature rises.

If the device powers-up or exits its reset state, the fan

will not start unless VT1 or VT2 rises above VWAKE.

System Operation

Power Up

• A complete reset occurs when power is applied.

• OUT is off (low) and /OTF is inactive (high/floating).

• If VT1 < VIL, the MIC502 remains in shutdown.

• The startup interval begins. OUT will be on (high) for

64 clock cycles (64 × tPWM).

• Following the startup interval, normal operation

begins.

Reset Startup Timer;

Deassert /OTF;

OUT Off (Low)

VT1 >VOT

POWER ON

VT1 <VIL

OUT Held On (High)

During Startup

Interval.

Startup Interval

Finished

Deassert OUT

(OUT = Low)

YES

Assert /OTF While

VT1 >VOT

NORMAL

OP ERATION

YES

YE S

Figure 3. Power-Up Behavior

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