4052L-P16-R datasheet(4/6 Pages) UTC

4 / 6 page

4052

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

4 of 6

www.unisonic.com.tw

QW-R502-013.D

DYNAMIC ELECTRICAL CHARACTERISTICS

(CL = 50pF, Ta=25°C, VEE≦VSS, unless otherwise specified)

PARAMETER

SYMBOL

VDD–VEE

Vdc

TEST CONDITIONS

MIN

TYP

MAX UNIT

Propagation Delay Times

Switch Input to Switch

Output (RL = 10 kΩ)

tPLH, tPHL

tPLH, tPHL =(0.17 ns/pF)CL + 21.5ns

tPLH, tPHL =(0.08 ns/pF)CL + 8.0ns

tPLH, tPHL =(0.06 ns/pF)CL + 7.0ns

300

600

155

310

Inhibit to Output

tPHZ, tPLZ

tPZH, tPZL

(RL=10kΩ, VEE=VSS)

Output “1” or “0” to High Impedance,

or High Impedance to “1” or “0” Level

125

250

325

650

130

260

Control Input to Output

tPLH, tPHL

RL = 10 kΩ, VEE = VSS

180

Total Harmonic Distortion

THD

RL = 10KΩ, f = 1 kHz, VIN = 5 VPP

0.07

Bandwidth

RL = 1kΩ, VIN = 1/2 (VDD–VEE) p–p,

CL = 50pF, 20 Log (VOUT/VIN) = -3dB)

MHz

Off Channel Feedthrough

Attenuation

RL=1KΩ, VIN = 1/2 (VDD–VEE) p–p

fIN = 30MHz

-50

Channel Separation

RL = 1kΩ, VIN = 1/2 (VDD–VEE) p–p

fIN = 3MHz

-50

Crosstalk, Control Input to

Common O/I

R1 = 1kΩ, RL = 10kΩ Control

tTLH = tTHL = 20ns, Inhibit = VSS

Note: 1. Data of “TYP” is intended as an indication of the IC’s potential performance.

2. For voltage drops across the switch(ΔVsw)>600mV (>300mV at high temperature), excessive VDD current

may be drawn, i.e. the current out of the switch may contain both VDD and switch input components. The

reliability of the device will be unaffected unless the Maximum Ratings are exceeded.

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