M24LR64-R_1006 datasheet(23/128 Pages) STMICROELECTRONICS

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M24LR64-R

System memory area

Doc ID 15170 Rev 10

23/128

System memory area

4.1

M24LR64-R RF block security

The M24LR64-R provides a special protection mechanism based on passwords. Each

memory sector of the M24LR64-R can be individually protected by one out of three available

passwords, and each sector can also have Read/Write access conditions set.

Each memory sector of the M24LR64-R is assigned with a Sector security status byte

including a Sector Lock bit, two Password Control bits and two Read/Write protection bits as

shown in Table 7. Table 6 describes the organization of the Sector security status byte which

can be read using the Read Single Block and Read Multiple Block commands with the

Option_flag set to ‘1’.

On delivery, the default value of the SSS bytes is reset to 00h.

When the Sector Lock bit is set to ‘1’, for instance by issuing a Lock-sector Password

command, the 2 Read/Write protection bits (b1, b2) are used to set the Read/Write access of

the sector as described in Table 8.

Table 6.

Sector Security Status Byte area

I2C byte address

Bits [31:24]

Bits [23:16]

Bits [15:8]

Bits [7:0]

E2 = 1

SSS 3

SSS 2

SSS 1

SSS 0

E2 = 1

SSS 7

SSS 6

SSS 5

SSS 4

E2 = 1

SSS 11

SSS 10

SSS 9

SSS 8

E2 = 1

SSS 15

SSS 14

SSS 13

SSS 12

E2 = 1

SSS 19

SSS 18

SSS 17

SSS 16

E2 = 1

SSS 23

SSS 22

SSS 21

SSS 20

E2 = 1

SSS 27

SSS 26

SSS 25

SSS 24

E2 = 1

SSS 31

SSS 30

SSS 29

SSS 28

E2 = 1

SSS 35

SSS 34

SSS 33

SSS 32

E2 = 1

SSS 39

SSS 38

SSS 37

SSS 36

E2 = 1

SSS 43

SSS 42

SSS 41

SSS 40

E2 = 1

SSS 47

SSS 46

SSS 45

SSS 44

E2 = 1

SSS 51

SSS 50

SSS 49

SSS 48

E2 = 1

SSS 55

SSS 54

SSS 53

SSS 52

E2 = 1

SSS 59

SSS 58

SSS 57

SSS 56

E2 = 1

SSS 63

SSS 62

SSS 61

SSS 60

Table 7.

Sector security status byte organization

Password Control bits

Read / Write protection

bits

Sector

Lock

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