HCS360 datasheet(13/40 Pages) MICROCHIP

13 / 40 page

DS40152F-page 13

HCS360

5.0

SPECIAL FEATURES

5.1

Code Word Completion

Code word completion is an automatic feature that

ensures that the entire code word is transmitted, even

if the button is released before the transmission is com-

plete and that a minimum of two words are completed.

The HCS360 encoder powers itself up when a button is

pushed and powers itself down after two complete

words are transmitted if the user has already released

the button. If the button is held down beyond the time

for one transmission, then multiple transmissions will

result. If another button is activated during a

transmission, the active transmission will be aborted

and the new code will be generated using the new

button information.

5.2

Long Guard Time

Federal Communications Commission (FCC) part 15

rules specify the limits on fundamental power and

harmonics that can be transmitted. Power is calculated

on the worst case average power transmitted in a 100

ms window. It is therefore advantageous to minimize

the duty cycle of the transmitted word. This can be

achieved by minimizing the duty cycle of the individual

bits or by extending the guard time between transmis-

sions. Long guard time (LNGRD) is used for reducing

the average power of a transmission. This is a select-

able feature. Using the LNGRD allows the user to

transmit a higher amplitude transmission if the

transmission time per 100 ms is shorter. The FCC puts

constraints on the average power that can be

transmitted by a device, and LNGRD effectively

prevents continuous transmission by only allowing the

transmission of every second word. This reduces the

average power transmitted and hence, assists in FCC

approval of a transmitter device.

5.3

CRC (Cycle Redundancy Check)

Bits

The CRC bits are calculated on the 65 previously trans-

mitted bits. The CRC bits can be used by the receiver

to check the data integrity before processing starts. The

CRC can detect all single bit and 66% of double bit

errors. The CRC is computed as follows:

EQUATION 5-1:

CRC Calculation

and

with

and

Din the nth transmission bit 0 ≤n ≤64

Note: The CRC may be wrong when the battery

voltage is around either of the VLOW trip

points. This may happen because VLOW is

sampled twice each transmission, once for

the CRC calculation (PWM is low) and once

when VLOW is transmitted (PWM is high).

VDD tends to move slightly during a transmis-

sion which could lead to a different value for

VLOW being used for the CRC calculation

and the transmission

Work around: If the CRC calculation is incor-

rect, recalculate for the opposite value of

VLOW.

CRC 1

[]n 1

CRC 0

[]n Din

∧

CRC 0

[]n 1

CRC 0

[]n Din

∧

() CRC 1

[]n

∧

CRC 10

[]0

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