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16F1828 数据表(PDF) 39 Page - Microchip Technology |
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16F1828 数据表(HTML) 39 Page - Microchip Technology |
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39 / 419 page  2010 Microchip Technology Inc. Preliminary DS41419B-page 39 PIC16(L)F1824/1828 Bank 6 300h(1) INDF0 Addressing this location uses contents of FSR0H/FSR0L to address data memory (not a physical register) xxxx xxxx xxxx xxxx 301h(1) INDF1 Addressing this location uses contents of FSR1H/FSR1L to address data memory (not a physical register) xxxx xxxx xxxx xxxx 302h(1) PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000 303h(1) STATUS — — —TO PD ZDC C ---1 1000 ---q quuu 304h(1) FSR0L Indirect Data Memory Address 0 Low Pointer 0000 0000 uuuu uuuu 305h(1) FSR0H Indirect Data Memory Address 0 High Pointer 0000 0000 0000 0000 306h(1) FSR1L Indirect Data Memory Address 1 Low Pointer 0000 0000 uuuu uuuu 307h(1) FSR1H Indirect Data Memory Address 1 High Pointer 0000 0000 0000 0000 308h(1) BSR — — — BSR<4:0> ---0 0000 ---0 0000 309h(1) WREG Working Register 0000 0000 uuuu uuuu 30Ah(1) PCLATH — Write Buffer for the upper 7 bits of the Program Counter -000 0000 -000 0000 30Bh(1) INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 0000 000x 0000 000u 30Ch — Unimplemented — — 30Dh — Unimplemented — — 30Eh — Unimplemented — — 30Fh — Unimplemented — — 310h — Unimplemented — — 311h CCPR3L Capture/Compare/PWM Register 3 (LSB) xxxx xxxx uuuu uuuu 312h CCPR3H Capture/Compare/PWM Register 3 (MSB) xxxx xxxx uuuu uuuu 313h CCP3CON — — DC3B1 DC3B0 CCP3M3 CCP3M2 CCP3M1 CCP3M0 --00 0000 --00 0000 314h — Unimplemented — — 315h — Unimplemented — — 316h — Unimplemented — — 317h — Unimplemented — — 318h CCPR4L Capture/Compare/PWM Register 4 (LSB) xxxx xxxx uuuu uuuu 319h CCPR4H Capture/Compare/PWM Register 4 (MSB) xxxx xxxx uuuu uuuu 31Ah CCP4CON — — DC4B1 DC4B0 CCP4M3 CCP4M2 CCP4M1 CCP4M0 --00 0000 --00 0000 31Bh — Unimplemented — — 31Ch — Unimplemented — — 31Dh — Unimplemented — — 31Eh — Unimplemented — — 31Fh — Unimplemented — — TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED) Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on POR, BOR Value on all other Resets Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved. Shaded locations are unimplemented, read as ‘0’. Note 1: These registers can be addressed from any bank. 2: PIC16F/LF1828 only. 3: PIC16F/LF1824 only. |
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