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900844 数据表(PDF) 97 Page - Freescale Semiconductor, Inc |
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900844 数据表(HTML) 97 Page - Freescale Semiconductor, Inc |
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97 / 118 page ![]() Analog Integrated Circuit Device Data Freescale Semiconductor 97 900844 FUNCTIONAL DEVICE OPERATION ADC SUBSYSTEM ADEXGAIN20 2 Gain bit for ADC channel 20 x0 = x1 (0-2.0 V input range) x1 = x10 (0-200 mV input range) ADEXGAIN21 3 Gain bit for ADC channel 21 x0 = x1 (0-2.0 V input range) x1 = x10 (0-200 mV input range) Reserved 7:4 Reserved Table 69. ADC Channel Selector/Configuration Structure and bit Description Name Bits Description ADCSNSxH (x = 0 to 31) ADCHxH 6:0 7 MSBs of ADC result for Channel x GAINx 7 Gain bit for ADC channel x, x = 0 to 31 x0 = x1 (0-2.0 V input range) x1 = x10 (0-200 mV input range) ADCSNSxL (x = 0 to 31) ADCHxL 2:0 3 LSBs of ADC result for Channel x Reserved 7:3 Reserved ADCADDRX (X = 0 TO 31) ADSELx 4:0 ADC Channel to be read Selection bits x00 = Channel 0 x01 = Channel 1 ... x1F = Channel 31 XPXMx 5 Turns on X+ and X- bias FETs, Refer to Figure 50 x0 = FETS Off x1 = FETS On YPYMx 6 Turns on Y+ and Y- bias FETs, Refer to Figure 50 x0 = FETS Off x1 = FETS On XMYPx 7 Turns on X- and Y+ bias FETs, Refer to Figure 50 x0 = FETS Off x1 = FETS On Table 68. ADC Control Registers Structure and Bits Description Name Bits Description |
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