ADP2147

Rev. 0 | Page 14 of 16

Capacitors with lower equivalent series resistance (ESR) are

preferred to guarantee low output voltage ripple, as shown in

the following equation:

RIPPLE

RIPPLE

COUT

I

V

ESR

≤

The effective capacitance needed for stability, which includes

temperature and dc bias effects, is 3 μF.

Table 7. Suggested 4.7 μF Capacitors

Vendor

Type

Model

Case

Size

Voltage

Rating (V)

Murata

X5R

GRM188R60J475

0603

6.3

Taiyo Yuden

X5R

JMK107BJ475

0603

6.3

TDK

X5R

C1608X5R0J475

0603

6.3

Input Capacitor

Higher value input capacitors help to reduce the input voltage

ripple and improve transient response. Maximum input

capacitor current is calculated using the following equation:

IN

OUT

IN

OUT

MAX

LOAD

CIN

V

V

V

V

I

I

)

(

)

(

−

≥

To minimize supply noise, place the input capacitor as close to

the VIN pin of the ADP2147 as possible. As with the output

capacitor, a low ESR capacitor is recommended. The list of

recommended capacitors is shown in Table 8.

Table 8. Suggested 4.7 μF Capacitors

Vendor

Type

Model

Case

Size

Voltage

Rating (V)

Murata

X5R

GRM188R60J475

0603

6.3

Taiyo Yuden

X5R

JMK107BJ475

0603

6.3

TDK

X5R

C1608X5R0J475

0603

6.3

THERMAL CONSIDERATIONS

Because of the high efficiency of the ADP2147, only a small

amount of power is dissipated inside the ADP2147 package, which

reduces thermal constraints of the design.

However, in applications with maximum loads at high ambient

temperature, low supply voltage, and high duty cycle, the heat

dissipated in the package is high enough that it may cause the

junction temperature of the die to exceed the 125°C maximum.

If the junction temperature exceeds 150°C, the converter enters

thermal shutdown. The regulator recovers when the junction

temperature falls below 130°C.

The junction temperature of the die is the sum of the ambient

temperature of the environment and the temperature rise of the

package due to power dissipation, as shown in the following

equation:

where:

dissipation.

The package’s rise in temperature is directly proportional to the

power dissipation in the package. The proportionality constant

for this relationship is the thermal resistance from the junction

of the die to the ambient temperature, as shown in the following

equation:

where:

ambient temperature of the package.

PCB LAYOUT GUIDELINES

Poor layout can affect the ADP2147 performance, causing EMI

and electromagnetic compatibility problems, ground bounce,

and voltage losses. Poor layout can also affect regulation and

stability. To implement a good layout, use the following rules:

•

Place the inductor, input capacitor, and output capacitor

close to the IC using short tracks. These components carry

high switching frequencies, and large tracks act as antennas.

•

Route the output voltage path away from the inductor and

SW node to minimize noise and magnetic interference.

•

Maximize the size of ground metal on the component side

to help with thermal dissipation.

•

Use a ground plane with several vias connecting to the com-

ponent side ground to further reduce noise interference on

sensitive circuit nodes.