IP1844/IP1845

IP3844

IP2844/IP2845

IP3845

Parameter

Test Conditions

Min.

Typ.

Max.

Min.

Typ.

Max.

Units

2.85

3

3.15

0.9

1

1.1

60

70

–2

–10

150

300

0.1

0.4

1.5

2.2

13

13.5

12

13.5

50

150

50

150

0.7

1.1

14.5

16

17.5

7.8

8.4

9

8.5

10

11.5

7

7.6

8.2

0.3

0.5

11

15

14

17

30

34

40

46

48

50

0

2.85

3

3.15

0.9

1

1.1

60

70

–2

–10

150

300

0.1

0.4

1.5

2.2

13

13.5

12

13.5

50

150

50

150

0.7

1.1

15

16

17

7.8

8.4

9

910

11

7

7.6

8.2

0.3

0.5

11

15

14

17

30

34

40

47

48

50

0

Gain

Maximum Input Signal

Supply Voltage

Rejection

Input Bias Current

Delay to Output

Output Low Level

Output High Level

Rise Time

Fall Time

UVLO Saturation

Upper Threshold

Lower Threshold

Start–up Current

Operating Supply

Current

Maximum Duty Cycle

Minimum Duty Cycle

See Notes 2,3

(Note 2)

1844 Series

1845 Series

1844 Series

1845 Series

1844 Series

1845 Series

V/V

V

dB

µA

ns

V

V

ns

V

V

V

mA

mA

V

%

LAB

SEME

IP1844 SERIES

IP1845 SERIES

Prelim. 2/95

CURRENT SENSE SECTION

OUTPUT SECTION

UNDER–VOLTAGE LOCKOUT SECTION

PWM SECTION

NOTES

1. Test Conditions unless otherwise stated:

required level.

All specifications apply over the full operating temperature

range unless otherwise stated.

(See Ordering Information for further details).

2. Parameter measured at trip point of latch with

3. Gain defined as:

∆V

PIN1

A = ∆V

PIN3

0

≤ V

TOTAL STANDBY CURRENT