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CS1501-FSZ 数据表(PDF) 9 Page - Cirrus Logic

部件名 CS1501-FSZ
功能描述  Digital Power Factor Correction Control IC
PDF  11 Pages
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制造商  CIRRUS [Cirrus Logic]
网页  http://www.cirrus.com
标志 CIRRUS - Cirrus Logic

CS1501-FSZ 数据表(HTML) 9 Page - Cirrus Logic

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CS1501
DS927PP6
9
5. GENERAL DESCRIPTION
The CS1501 offers numerous features, options, and
functional capabilities to the designer of switching power
converters. This digital PFC control IC is designed to replace
legacy analog PFC controllers with minimal design effort.
5.1 PFC Operation
One key feature of the CS1501 is its operating frequency
profile. Figure 11 illustrates how the frequency varies over one
half cycle of the line voltage in steady-state operation. When
power is first applied to the CS1501, it examines the line
voltage and adapts its operating frequency to the line voltage
as shown in Figure 11. The operating frequency is varied from
the peak to the trough of the AC input. During startup, the
control algorithm generates maximum power while operating
in critical conduction mode (CRM), providing an approximate
square-wave current envelop within every half-line cycle.
Figure 11. Switching Frequency vs. Phase Angle
Figure 12 illustrates how the operating frequency (as a
percentage of maximum frequency) changes with output
power and the peak of the line voltage.
Figure 12. Max. Switching Frequency vs. Output Power
When PO falls below 5%, the CS1501 changes to Burst Mode.
(Refer to Burst Mode section for more information.)
The CS1501 is designed to function as a DCM controller.
However, during peak periods, the controller may interchange
control methods and operate in a quasi-critical-conduction
mode (quasi-CRM) at low line. For example, at 90VAC main
input under full load, the PFC controller will function as a
quasi-CRM controller at the peak of the AC line cycle, as
shown in Figure 13.
Figure 13. DCM and quasi-CRM Operation with CS1501
The zero-current detection (ZCD) of the boost inductor is
achieved using an auxiliary winding. When the stored energy
of the inductor is fully released to the output, the voltage on the
ZCD pin decreases, triggering a new switching cycle. This
quasi-resonant switching allows the active switch to be turned
on with near-zero inductor current, resulting in a nearly
lossless switch event. This minimizes turn-on losses and EMI
noise created by the switching cycle. Power factor correction
control is achieved during light load by using on-time
modulation.
5.2 Startup vs. Normal Operation Mode
The CS1501 has two discrete operation modes: startup and
normal. Startup mode will be activated when Vlink is less than
90% of nominal value, VO(startup) and remains active until Vlink
reaches 100% of nominal value, as shown in Figure 14.
Startup mode is activated during initial system power-up. Any
Vlink drop to less than VO(startup), such as a load change, can
cause the system to enter startup mode until Vlink is brought
back into regulation.
Figure 14. Startup and Normal Modes
Startup mode is defined as a surge of current delivering
maximum power to the output regardless of the load. During
every active switch cycle, the 'ON' time is calculated to drive a
constant peak current over the entire line cycle. However, the
'OFF' time is calculated based on the DCM/CCM boundary
equation.
0
20
40
60
80
100
120
045
90
135
180
Rectified Line Voltage Phase (Deg.)
Switching Freq. (% of Max.)
Line Voltage (% of Max.)
% PO max
Vin < 181 VAC
20
70
50
60
40
40
5
20
0
60
80
100
Vin > 147 VAC
46
56
DCM
Quasi CRM
DCM
Quasi CRM
DCM
ILB
t [ms]
IAC
t[ms]
Vlink
[V]
100%
90%
Normal
Mode
Normal
Mode



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