L6728D

Pin description and connection diagram

Doc ID 16498 Rev 1

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2

Pin description and connection diagram

2.1

Pin descriptions

Figure 3.

Pin connection (top view)

L6728D

Table 2.

Pins description

Pin n°

Name

Function

1BOOT

HS driver supply. Connect through a capacitor (100 nF) to the floating node (LS-Drain) pin

and provide necessary bootstrap diode from VCC.

2

PHASE

HS driver return path, current-reading and adaptive-dead-time monitor. Connect to the LS

drain to sense

adaptive-dead-time control circuitry to monitor when HS MOSFET is OFF.

3

UGATE

HS driver output. Connect directly to HS MOSFET gate.

4

LGATE / OC

LGATE: LS driver output. Connect directly to LS MOSFET gate. OC: Overcurrent threshold

set. During a short period of time following VCC rising over the UVLO threshold, a 10

μA

program the OC threshold. The resulting voltage at this pin is sampled and held internally as

the OC set point. The maximum programmable OC threshold is 0.55 V. A voltage greater than

0.6 V activates an internal clamp and causes the OC threshold to be set at the maximum

value.

5GND

All internal references, logic and drivers are connected to this pin. Connect to the PCB ground

plane.

6VCC

Device and driver power supply. Operating range from 5 V to 12 V. Filter with at least 1 µF

MLCC to GND.

7

COMP / DIS

control loop. DIS: The device can be disabled by pushing this pin lower than 0.75 V (typ). By

setting the pin free, the device is enabled again.

8FB

output resistor divider may be used to regulate voltages higher than the reference.

9

VSEN

Regulated voltage sense pin for OVP and UVP protection and PGOOD. Connect to the output

regulated voltage, or to the output resistor divider if the regulated voltage is higher than the

reference.

10

PGOOD

Open drain output set free after SS has finished and pulled low when VSEN is outside the

relative window. Pull up to a voltage equal or lower than VCC. If not used it can be left

floating.