PROGRAMMABLE, HIGH PERFORMANCE

MULTI-PHASE, PWM CONTROLLER

SC1144

© 1999 SEMTECH CORP.

652 MITCHELL ROAD NEWBURY PARK CA 91320

Preliminary - August 24, 1999

4

The SC1144 is patent pending

NOTE: (1) All logic inputs and outputs are open collector TTL compatible.

PIN DESCRIPTION

Pin #

Pin Name

Pin Function

1V

CC 5V

Supply voltage input (5V nominal)

2

Divsel

Connect to Gnd for four phase operation and to logic High for three Phase

operation.

3

Clksel

Clock Select: Logic high selects internal clock. Logic low selects external

clock.

4

Extclk

External Clock Input. The output frequency is determined by (Clock Input

Freq.)/4. Output freq.= (Clock Input)/4. Pull up to Vcc5v to select internal

clock.

5R

REF

Connects to external reference resistor. Sets the operating frequency of

the internal clock and the ramp time for the PWM. Reference voltage at

this pin is 2.05V. Trimmed to set 250µA at 8MHz.

6VID0

(1)

Programming Input (LSB)

7VID1

(1)

Programming Input

8VID2

(1)

Programming Input

9VID3

(1)

Programming Input

10

VID4

(1)

Programming Input (MSB)

11

OC+

Over current comparator. Non-Inverting input.

12

OC-

Over current comparator. Inverting input.

13

COMP

Compensation Pin. Compensation is acheived by connecting a capacitor in

series with a resistor between this pin and FBG. A 300k ohm resistor must

also be directly connected between this pin and FBG.

14

FB

Feedback input connected to supply output.

15

B

GOUT

Bandgap Reference Output. Output resistance=3kohm. Must be bypassed

with 4.7nf -100nf capacitor to FBG. This capacitor programs the soft start

time.

16

FBG

Feedback Ground. This pin must be connected to return side of output

caps. This pin is floating, (within one diode drop of GND pin).

17

ENABLE

Connects to 5V to enable. Connect to GND to disable entire device.

18

GND

Ground Pin

19

DRV2

Phase 2 output

20

DRV0

Phase 0 output

21

V

CC12V

Supply voltage for the FET Drivers/DRV0-3

22

DRV1

Phase 1 output

23

DRV3

Phase 3 output

24

OutV

Sets the maximum DRV0-3 drive voltage in order to reduce switching

losses in the external MOSFETs.