VRM9.0 PROGRAMMABLE, MULTI-PHASE,

HIGH PERFORMANCE PWM CONTROLLER

SC1146

© 2000 SEMTECH CORP.

652 MITCHELL ROAD NEWBURY PARK CA 91320

July 25, 2000

8

The SC1146 is patent pending

FUNCTIONAL DESCRIPTION

The SC1146 is a programmable, high performance,

multi-phase controller designed for the most demand-

ing DC/DC converter applications in which transient

response, space, input ripple current and component

form factor and cost are paramount. The SC1146 is

configured to operate with external MOSFET drivers,

such as the SC1405, in high efficiency synchronous

applications (See Evaluation Board Schematic).

The SC1146 based dc/dc converter consists of four

buck converter controllers integrated and synchro-

nized. The high clock frequency allows for smaller in-

ductor values and miniature surface mount, low induc-

tance output capacitors. Since each stage has ¼ the

output current, the conduction losses in each stage is

reduced by a factor of 1/16. Precision active trimming

ensures 1% matching of duty cycles among phases,

thus ensuring the heat and component stress is shared

equally. The SC1146 may also be configured in asyn-

chronous mode by using buffer transistors.

DECODER/BIAS GENERATOR/PWM CONTROLLER

The 8 MHz clock is divided down to 2 MHz for four

phase operation by the clock decoder. The start of the

output pulses are time shifted 90 degrees by the de-

coder with respect to each other. The Bias Generator

generates the ramps to each phase by a precision

trimmed current source and on-chip capacitors. The

decoder, which is synchronized to the bias generator

via the master clock, phase shifts the ramps and en-

ables the PWM controller sequentially. A resistor from

R

Clock Freq = (8.2K/Rref) *8Mhz

The ramps are then compared to the error amplifier out-

put at the high speed PWM comparator inputs. The con-

troller outputs are buffered versions of the comparator

outputs.

ERROR AMPLIFIER

At the heart of the controller is an ultra-fast, transcon-

ductance error amplifier. Since the output inductor val-

ues can be selected to be a minimum, usually less than

a micro-Henry, the delays due to inductor ramp time are

minimized during transient load recovery. The higher

frequency of operation also allows use of much smaller

capacitance on the output. This means that the dc/dc

converter output capacitors “hold time” is less. The error

amplifier must therefore respond extremely fast

“Recover the Fort” after a transient. The SC1146 error

amplifier recovers to its normal duty cycle after applica-

tion of a full load transient within 2 usec maximum,

(largely dependant on supply quality) and usually within

1usec. This minimizes undershoot and overshoot during

application of a transient.

THEORY OF OPERATION

Fig. 2: The four Gate Drives firing 90° out of phase.

V

operation.

Fig. 1: V