M4334

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

9 of 9

www.unisonic.com.tw

QW-R502-441A

SYSTEM CLOCK

The M4334 accepts data at standard audio sample rates including 48, 44.1 and 32 kHz in BRM and 96, 88.2

and 64 kHz in HRM. The LRCK chooses the channel and delineation of data, and the SCLK clocks audio data into

the input data buffer.

MCLK

MCLK must be either 256x, 384x or 512x the desired input sample rate in BRM and either 128x or 192x the

desired input sample rate in HRM. The LRCK frequency is equal to Fs, the frequency at which words for each

channel are input to the device. The MCLK-to-LRCK frequency ratio is detected automatically during the initialization

sequence by counting the number of MCLK transitions during a single LRCK period. Internal dividers are set to

generate the proper clocks. The MCLK, LRCK and SCLK must be synchronous. Table 1 illustrates several standard

audio sample rates and the required MCLK and LRCK frequencies.

MCLK(MHz)

HRM

BRM

LRCK(kHz)

128x

192x

256x

384x

512x

32

4.0960

6.1440

8.1920

12.2880

16.3840

44.1

5.6448

8.4672

11.2896

16.9344

22.5792

48

6.1440

9.2160

12.2880

18.4320

24.5760

64

8.1920

12.2880

88.2

11.2896

16.9344

96

12.2880

18.4320

Table 1. Common Clock Frequencies

SCLK

The SCLK controls the shifting of data into the input data buffers. The M4334 supports both internal and

external SCLK generation modes.

Internal SCLK Mode

In the Internal SCLK Mode, the SCLK is internally derived and synchronous with MCLK and LRCK. The

SCLK/LRCK frequency ratio is either 32, 48, or 64 depending upon data format. Operation in this mode is identical to

operation w- ith an external SCLK synchronized with LRCK. This mode allows access to the digital de-emphasis

function.

While the Internal SCLK Mode is provided to allow access to the de-emphasis filter, the Internal SCLK Mode

also eliminates possible clock interference from an external SCLK.

External SCLK Mode

The M4334 will enter the external SCLK mode when 16 low to high transitions are detected on the DEM/SCLK

pin during any phase of the LRCK period. When this mode is enabled, the Internal SCLK Mode and de-emphasis

filter cannot be accessed. The M4334 will switch to Internal SCLK Mode if no low to high transitions are detected on

the DEM/SCLK pin for 2 consecutive frames of LRCK.

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