TS2043

Preliminary

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

7 of 8

www.unisonic.com.tw

QW-R502-404.a

APPLICATION INFORMATION(Cont.)

Serial Interface

Once a falling signal applies on /CS pin (active in low), the operation is initiated. After /CS falls, the UTC

TS2043

begins to look for a start bit on the DIN input. At the end of the operation the /CS pin should be pulled high,

which minimizes supply current if DCLK is left running.

Control Byte

The first eight clock cycles provides the control byte on DIN pin. (See Table I and Table II for more information).

The control byte represents the start operation, addressing, resolution, and power down information.

Table I. Control Bits in the Control Byte

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Start

A2

A1

A0

Mode1

Mode0

PD1

PD0

Table II. Description of the Control Bits

BIT

NAME

DESCRIPTION

7

Start

Start Bit.

6,5,4

A2,A1,A0

Input Channel Select Bits.

3,2

Mode1

Mode0

12-Bit / 8-Bit Conversion

Configuration Bit.

1,0

PD1,PD0

Power Down Control Bits

Start Bit – Initiate Start

The control byte starts with the first high bit on DIN. The first bit must always be logic high (1) to initiate the start

of the conversion. The UTC TS2043 will not start until the start bit is detected.

Addressing Bits – Input Channel Selection

The next three bits on control byte are addressing bits (A2, A1, A0), which select the active input channel of the

input multiplexer, and touch panel drivers. (See Table III for more information).

Table III. Input Channel Configuration

A2

A1

Input

Channel

X Switch

Y Switch

Reference

0

0

X+

OFF

ON

1

0

Y+

ON

OFF

0

1

IN3

OFF

OFF

1

1

IN4

OFF

OFF

Mode Bits – Conversion Resolution Configuration

The Mode bits (Mode1, Mode0) set the resolution of this device. With the Mode1 bit LOW (0), the following

conversion will have 12 bits of resolution. With the Mode1 bit HIGH (1) the following conversion will have 8 bits of

resolution. (See Table IV for more information.)

Table IV. Resolution Configuration

Mode1

Mode0

DESCRIPTION

0

1

12bits Resolution

0

0

12bits Resolution

1

1

8bits Resolution

1

0

8bits Resolution

PD0 and PD1 Bits - Power Down Control

The last two bits are PD1 and PD0 bits, which control the power down mode of the UTC TS2043. Through

applying a same logic high(1) this device enters a power-up mode, while enters a power-down mode by a same

logic low (0) on PD1 and PD0 bits.(See Table V for more information).

Table V. Power-Down Selection

PD1

PD0

PENIRQ

DESCRIPTION

0

0

Enable

Power-Down between conversions. Y- switch is on.

0

1

Disable

Power-Down between conversions. Y- switch is off. /PENIRQ is disabled

1

0

Disable

No used.

1

1

Disable

No Power-Down between conversions.