Freescale QorIQ communications platforms

are the next-generation evolution of our

leading PowerQUICC communications

processors. Built using high-performance

enable a new era of networking innovation

where the reliability, security and quality of

service for every connection matters.

QorIQ P1012 and P1021

Communications Processors

The QorIQ P1 platform series, which includes

the P1012 and P1021 communications

processors, offers the value of extensive

integration and extreme power intelligence

for a wide variety of applications in the

networking, telecom, defense and industrial

markets. Based on 45 nm technology for

low-power implementation, the P1012 and

P1021 processors provide single- and dual-

core solutions for the 533 MHz to 800 MHz

performance range, along with advanced

security and a rich set of interfaces.

The P1012 and P1021 processors are

perfectly suited for multi-service gateways,

Ethernet switch controllers, wireless LAN

access points and high-performance general-

purpose control processor applications with

tight thermal constraints.

The QorIQ P1012 and P1021 processors are

pin-compatible with the QorIQ P1011, P1020

and P2 platform products, offering a six-chip

range of cost-effective solutions. Scaling from

a single core at 533 MHz (P1012) to a dual

core at 1.2 GHz per core (P2020), the two

QorIQ platforms deliver an impressive 4.5x

aggregate frequency range.

The devices in these two platforms are

software compatible, sharing the e500

Power Architecture core and peripherals,

as well as being fully software compatible

with the existing PowerQUICC processors.

This enables you to create a product with

multiple performance points from a single

board design. The QorIQ P1021 dual-

core processor supports symmetric and

asymmetric processing, enabling you to

further integrate your design with the same

applications running on each core or serialize

your application using the cores for different

processing tasks.

The P1012 and P1021 processors have an

advanced set of features for ease of use.

The 256 KB L2 cache offers incremental

configuration to partition the cache between

the two cores or to configure it as SRAM or

stashing memory. The integrated security

engine supports the cryptographic algorithms

commonly used in IPsec, SSL, 3GPP and

other networking and wireless security

protocols. The memory controller offers future

proofing against memory technology migration

with support for both DDR2 and DDR3. It also

supports error correction codes, a baseline

requirement for any high-reliability system.

QorIQ Communications Platforms

P1 Series

P1012 and P1021 single- and dual-core communications processors

QorIQ P1012 and P1021 Block Diagram

32 KB

L1 I-Cache

e500 Core

32 KB

L1 D-Cache

256 KB

L2 Cache

32 KB

L1 I-Cache

Power Architecture

e500 Core

32 KB

L1 D-Cache

DDR2/DDR3

SDRAM Controller

Not on P1012

Coherency Module

System Bus

4-ch. DMA Controller

4-ch. DMA Controller

On-Chip Network

On-Chip Network

4-lane SerDes

TDM

Ethernet

UTOPIA-L2

Security

Acceleration

XOR

Interrupt Control,

SD/MMC, SPI,

USB 2.0/ULPI

3 x

Gigabit

Ethernet

Enhanced Local Bus

Controller (eLBC)

Cores

QUICC Engine