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P2010 数据表(PDF) 2 Page - Freescale Semiconductor, Inc |
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P2010 数据表(HTML) 2 Page - Freescale Semiconductor, Inc |
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2 / 2 page ![]() Target Applications The P2010 and P2020 processors serve in a wide range of applications, especially those that have tight thermal constraints. With an available junction temperature range of -40°C to +125°C, the devices can be used in power-sensitive defense, aerospace and industrial applications, and less-protected outdoor environments. They enable various combinations of data plane and control plane workloads in networking and telecom applications that require higher performance but want to avoid the complexity of partitioning the application across many cores. The devices’ primary target applications are networking and telecom linecards. The P2 devices, with their low power budget and high single-threaded performance, are uniquely well-suited for control plane applications. Control plane applications tend to be more sequential in nature and thus lose scaling efficiency with increasing number of threads or cores. The P2 series, with its low power, efficient dual-issue out-of-order e500 core, Power Architecture technology, and high 1.2 GHz frequency, offers a level of single- threaded performance that is a perfect fit for control plane applications. The networking linecard requires an optimal combination of good performance to manage a large amount of control plane traffic balanced against low power and cost. With convenient I/O, flexible core configurations and an on-board security block, the P2010 and P2020 processors are well-suited for this application, which involves controlling ASICs, managing exceptions and routing table maintenance. The P2010 and P2020 processors are also well-suited for Long Term Evolution (LTE) and WiMAX channel card applications. With dual-core performance in single-core power budgets, the P2 series facilitates the “flattening” of the wireless network hierarchy. The dual Serial RapidIO interfaces allow direct connection to the DSPs (such as Freescale’s MSC8156 DSP) that implement Layer 1 processing as well as redundant backplane connections. Technical Specifications • Dual(P2020)orsingle(P2010) high-performance Power Architecture e500 cores 36-bit physical addressing Double-precision floating-point support 32 KB L1 instruction cache and 32 KB L1 data cache for each core 800 MHz to 1.2 GHz clock frequency • 512KBL2cachewithECC.Also configurable as SRAM and stashing memory. • Three10/100/1000Mbpsenhancedthree- speed Ethernet controllers (eTSECs) TCP/IP acceleration and classification capabilities IEEE 1588 support Lossless flow control R/G/MII, R/TBI, SGMII FIFO interfaces • High-speedinterfacessupportingvarious multiplexing options Four SerDes to 3.125 GHz multiplexed across controllers Three PCI Express interfaces Two Serial RapidIO interfaces Two SGMII interfaces • High-SpeedUSBcontroller(USB2.0) Host and device support Enhanced host controller interface (EHCI) ULPI interface to PHY • Enhancedsecuredigitalhostcontroller (SD/MMC) • Serialperipheralinterface • Integratedsecurityengine(SEC3.1) (optional) Crypto algorithm support includes 3DES, AES, RSA/ECC, MD5/SHA, ARC4, Kasumi, Snow 3G and FIPS deterministic RNG Single pass encryption/message authentication for common security protocols (IPsec, SSL, SRTP, WiMAX) XOR acceleration • 64-bitDDR2/DDR3SDRAMmemory controller with ECC support • Programmableinterruptcontroller(PIC) compliant with OpenPIC standard • Twofour-channelDMAcontrollers • TwoI2C controllers, DUART, timers • Enhancedlocalbuscontroller(eLBC) • 16general-purposeI/Osignals • Package: 689-pin wirebond power-BGA (TEPBGA2) Freescale, QorIQ, CoreNet and the Freescale logo are trademarks or registered trademarks of Freescale Semiconductor, Inc. in the U.S. and other countries. All other product or service names are the property of their respective owners. The Power Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks and service marks licensed by Power.org. © Freescale Semiconductor, Inc. 2009. Document Number: QP20XXFS REV 3 Learn More: For current information about Freescale products and documentation, please visit www.freescale.com/QorIQ. QorIQ™ Platform Device Cores Top Core Frequency L2 Size DDR 2/3 Support GE Ports SerDes PCI Express® Serial RapidIO® TDM P1 P1011 1 800 MHz 256 KB 32-bit with ECC 3 4 2 N/A Yes P1 P1020 2 800 MHz 256 KB 32-bit with ECC 3 4 2 N/A Yes P2 P2010 1 1200 MHz 512 KB 64-bit with ECC 3 4 3 2 N/A P2 P2020 2 1200 MHz 512 KB 64-bit with ECC 3 4 3 2 N/A |
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