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VIPER26 数据表(PDF) 13 Page - STMicroelectronics

部件名 VIPER26
功能描述  Fixed frequency VIPerTM plus family
PDF  25 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

VIPER26 数据表(HTML) 13 Page - STMicroelectronics

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VIPER26
Power section
Doc ID 17736 Rev 2
13/25
7
Power section
The power section is implemented with an n-channel power MOSFET with a breakdown
voltage of 800 V min. and a typical RDS(on) of 7 Ω. It includes a SenseFET structure to allow
a virtually lossless current sensing and the thermal sensor.
The gate driver of the power MOSFET is designed to supply a controlled gate current during
both turn-ON and turn-OFF in order to minimize common mode EMI. During UVLO
conditions, an internal pull-down circuit holds the gate low in order to ensure that the power
MOSFET cannot be turned ON accidentally.
8
High voltage current generator
The high voltage current generator is supplied by the DRAIN pin. At the first start up of the
converter, it is enabled when the voltage across the input bulk capacitor reaches the
VDRAIN_START threshold, sourcing the IDDch1 current (see Table 7 on page 6); as the VDD
voltage reaches the VDDon start-up threshold, the power section starts switching and the
high voltage current generator is turned OFF. The VIPer26 is powered by the external
source. After the start-up, the auxiliary winding or the diode connected to the output voltage
have to power the VDD capacitor with voltage higher than VDDCSon threshold (see Table 7
on page 6). During the switching, the internal current source is disabled and the
consumptions are minimized. In case of fault the switching is stopped and the device is self
biased by the internal high voltage current source; it is activated between the levels VDDCSon
and VDDon delivering the current IDDch2 to the VDD capacitor during the MOSFET off time,
see
Figure 22 on page 13.
At converter power-down, the VDD voltage drops and the converter activity stops as it falls
below VDDoff threshold (see Table 7 on page 6).
Figure 22.
Power on and power off
I
DD
V
DD
V
DRAIN
V
DDon
time
V
IN
V
DRAIN_START
Power-on
Power-off
Normal operation
regulation is lost here
V
IN < VDRAIN_START
HV startup is no more activated
V
DDCSon
V
DDoff
I
DDch1
I
DDch2
time
time
time



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