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AT89LP51-20MU 数据表(PDF) 97 Page - ATMEL Corporation |
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AT89LP51-20MU 数据表(HTML) 97 Page - ATMEL Corporation |
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97 / 113 page ![]() 97 3709C–MICRO–5/11 AT89LP51/52 - Preliminary Note: 1. No wait state (single-cycle) fetch speed for Fast Mode 18.5 Reset Characteristics The values shown in this table are valid for T A = -40°C to 85°C and VDD = 2.4 to 5.5V, unless otherwise noted. Table 18-1. External Clock Parameters Symbol Parameter V DD = 2.4V to 5.5V V DD = 4.5V to 5.5V Units Min Max Min Max 1/t CLCL Oscillator Frequency(1) 020025 MHz tCLCL Clock Period 50 40 ns tCHCX External Clock High Time 12 ns t CLCX External Clock Low Time 12 ns tCLCH External Clock Rise Time 5 ns tCHCL External Clock Fall Time 5 ns Table 18-2. Clock Characteristics Symbol Parameter Condition Min Max Units f XTAL Crystal Oscillator Frequency Low Power Oscillator 0 12 MHz High Power Oscillator 0 24 MHz fRC Internal Oscillator Frequency T A = 25°C; VDD = 5.0V 1.824 1.862 MHz VDD = 2.4 to 5.5V 1.751 1.935 MHz Table 18-3. Reset Characteristics Symbol Parameter Condition Min Max Units R RST Reset Pull-up Resistor 50 150 k Ω V POR Power-On Reset Threshold 1.3 1.6 V VBOD Brown-Out Detector Threshold 1.9 2.2 V V BH Brown-Out Detector Hysteresis 200 300 mV t POR Power-On Reset Delay 135 150 µs tWDTRST Watchdog Reset Pulse Width 49tCLCL ns |
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