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PC928 数据表(PDF) 3 Page - Sharp Corporation

部件名 PC928
功能描述  Shortcircuit Protector Circuit Built-in OPIC Photocoupler Suitable for Inverter-Driving IGBT
PDF  10 Pages
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制造商  SHARP [Sharp Corporation]
网页  http://sharp-world.com/
标志 SHARP - Sharp Corporation

PC928 数据表(HTML) 3 Page - Sharp Corporation

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(Ta=Topr unless otherwise specified)
Electro-optical Characteristics (2)
PC928
MIN.
TYP.
MAX.
Test circuit
Overcurrent detecting voltage
*10
VCTH
Ta = 25˚C, IF = 10mA
6.5
6.0
5.5
V
(9)
Overcurrent detecting voltage
hysteresis width
VCHIS
123
V
tPCOHL
Ta = 25˚C
FS = OPEN
-4
10
µ s
(13)
tPCOtf
25
-
µ s
--
2
V
(10)
VOE
Low level error
signal voltage
VFSL
Ta = 25˚C, IF = 10mA, IFS = 10mA
C = OPEN
-
0.2
0.4
V
(11)
High level error
signal current
IFSH
VC =0V
-
-
100
µ A
(12)
tPCFHL
Ta = 25˚C, RFS = 1.8k
VCC =VO1 = 24V, IF = 10mA
-1
5
µ s
(14)
Error signal output pulse width
∆ tFS
20
35
-
µ s
*9
*9
*9
VCC -VCC -VCC -
VCC =VO1 = 24V, RG =47
VCC =VO1 = 24V, IF = 10mA
CG = 3 000pF, RG =47
CP = 1 000pF, RC =1k
VCC =VO1 = 24V, RG =47
Ω , CG = 3 000pF,
VCC =VO1 = 24V, RG =47
Ω , CG = 3 000pF,
Ta = 25˚C, IF = 10mA, VFS = 24V,
CG = 3 000pF, RG =47
CP = 1 000pF, RC =1k
Precautions for Operation
Parameter
Symbol
Conditions
Unit
CG = 3 000pF, FS = OPEN
O2 "High
→Low" delay time
at protection from overcurrent
O2 fall time at protection
from overcurrent
O2 output voltage at protection
from overcurrent
*10 V
represents C-terminal voltage when O output goes from "High" to "Low".
CTH
2
*9 When measuring overcurrent, protective output and error signal output characteristics, connect a bypass capacitor (0.01
µ F or more) between V
and GND
CC
1. It is recommended that a capacitor of about 1000pF is added between C-terminal and GND in order to prevent
malfunction of C-terminal due to noise. In the case of capacitor added, rise of the detecting voltage is delayed.
Thus, use together a resistance of about 1k
Ω set between Vcc and C-terminal.
The C-terminal rise time varies with the time constant of CR added. Make it clear before use.
2. The light-detecting element used for this product is provided with a parasitic diode between each terminal and GND.
When a terminal happens to reach electric potential lower than GND potential even in a moment, malfunction
or rupture may result. Design the circuit so that each terminal will be kept at electric potential lower than the
GND potential at all times.
Error signal "High
→Low"
delay time
s
13
14 near the device.



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