SM5K3 datasheet(23/28 Pages) SHARP

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INSTRUCTION SET

Definition of Symbols

: Content of RAM at the address defined

by the B register.

←

: Transfer direction

∪

: Logical OR

∩

: Logical AND

⊕

: Exclusive OR

: An i bit of A register (i = 3 to 0)

Push

: Saves the contents of PC to stack

Pop

: Returns the contents saved in the stack

: Indicates output latch register or input

: Mode register. Rj register ( j = 3, A, B,

C, E, F)

ROM ( ) : Content stored in ROM location defined

by the value in ( ).

: Carry in ALU (independent of C flag)

The CY(carry) is a signal which is

generated when the ALU has been

carried by the execution of a command.

It is different from the C flag.

: Used to represent a group of bits in the

content of a register or memory. For

example, the X in the LDAX instruction

denotes the lower 2 digits (I1 and I0) of A

• A bit in a register is affixed to the register symbol,

e.g. a bit (i = 0, 1, 2, 3....) of X register is

expressed as Xi and P (R) register as P (R) i.

• Increment means binary addition of 1H and

decrement addition of FH.

• Skipping an instruction means to ignore that

instruction and to do nothing until starting the next

instruction. In this sense, an instruction to be

skipped is treated as an NOP instruction.

Skipping 1-byte instruction requires 1-cycle, and

2-byte instruction 2-cycle. Skipping 1-byte 2-cycle

instruction requires 1-cycle.

SM5K3/SM5K4/SM5K5

MNEMONIC

MACHINE CODE

OPERATION

ROM Addressing Instructions

TR x

80 to BF

←x (I5-I0)

TL xy

E0 to E7,

00 to FF

←x (I11-I6)

←y (I5-I0)

TRS x

C0 to DF

Push, PU

←01H,

←x (I4, I3, I2, I1, I0)

CALL xy

F0 to F7

00 to FF

Push, PU

←x (I11-I6)

←y (I5-I0)

RTN

Pop

RTNS

Pop, Skip the next step

RTNI

Pop, IME

←1

Data Load Instructions

LAX x

10 to 1F

←x (I3-I0)

LBMX x

30 to 3F

←x (I3-I0)

LBLX x

20 to 2F

←x (I3-I0)

LDA x

50 to 53

←M, BMi←BMi ⊕ x (I1, I0),

(i = 1, 0)

EXC x

54 to 57

↔A, BMi←BMi ⊕ x (I1, I0),

(i = 1, 0)

EXCI x

58 to 5B

↔A, BL←BL+1

BMi

←BMi ⊕ x (I1, I0), (i = 1, 0)

Skip the next step, if result

of BL = 0

EXCD x

5C to 5F

↔A, BL←BL–1

BMi

←BMi ⊕ x (I1, I0), (i = 1, 0)

Skip the next step, if result

of BL is = FH

EXAX

↔X-reg

ATX

X-reg

←A

EXBM

↔A

EXBL

↔A

↔SB

Instruction Summary

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