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Truth Table

Control Voltage

Bias Voltage & Current

Worst Case Step Error

Between Successive Attenuation States

Vdd = +5V ± 10%

Vdd (V)

Idd (Typ.)

(mA)

+4.5

4.0

+5.0

4.2

+5.5

4.4

State

Bias Condition

Low

0 to +0.8V @ -5 uA Typ.

High

+2.0 to + 5 Vdc @ 40 uA Typ.

Note: Vdd = +5V

Control Voltage Input

Attenuation

State

RF1 - RF2

V1

16 dB

V2

8 dB

V3

4 dB

V4

2 dB

V5

1 dB

High

High

High

High

High

Reference

I.L.

High

High

High

High

Low

1 dB

High

High

High

Low

High

2 dB

High

High

Low

High

High

4 dB

High

Low

High

High

High

8 dB

Low

High

High

High

High

16 dB

Low

Low

Low

Low

Low

31 dB

Any combination of the above states will provide an attenuation

approximately equal to the sum of the bits selected.

-1

-0.6

-0.2

0.2

0.6

1

0

0.5

1

1.5

2

2.5

3

3.5

4

FREQUENCY (GHz)

HMC470LP3 / 470LP3E

v04.1108

1 dB LSB GaAs MMIC 5-BIT DIGITAL

POSITIVE CONTROL ATTENUATOR, DC - 3 GHz