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SSL21083T 数据表(PDF) 6 Page - NXP Semiconductors

部件名 SSL21083T
功能描述  GreenChip drivers for LED lighting
PDF  24 Pages
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制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

SSL21083T 数据表(HTML) 6 Page - NXP Semiconductors

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SSL21081T_2T_3T_4T
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2011. All rights reserved.
Preliminary data sheet
Rev. 2 — 6 December 2011
6 of 24
NXP Semiconductors
SSL21081T/2T/3T/4T
GreenChip drivers for LED lighting
8.2 Conversion frequency
The conversion frequency must be limited to below 200 kHz. Therefore, select an
inductance value so that the conversion frequency is always within limits, given the supply
voltage, LED voltage and component spread.
8.3 Valley detection
A new cycle is started when the primary switch is switched on (see Figure 5). Following
time t1, when the peak current is detected on the SOURCE pin, the switch is turned off
and the secondary stroke starts (3). When the secondary stroke is complete and the coil
current at t3 equals zero, the drain voltage starts to oscillate around the VIN  VOUT level.
The amplitude equals VOUT. A special feature, called valley detection is an integrated part
of the SSL2108X circuitry. Dedicated built-in circuitry connected to the DRAIN pin, senses
when the voltage on the drain of the switch has reached its lowest value. The next cycle is
then started and as a result the capacitive switching losses are reduced. A valley is
detected and accepted if both the frequency of the oscillations and the voltage swing are
within the range specified (fring and ∆Vvrec(min)) for detection. If a valid valley is not
detected, the secondary stroke is continued until the maximum off-time (toff(high)) is
reached, then the next cycle is started.
8.4 Protections
The IC has the following protections:
UnderVoltage LockOut (UVLO)
Leading-Edge Blanking (LEB)
OverCurrent Protection (OCP)
Fig 5.
Buck waveforms and valley detection
001aan699
demagnetization
VIN
valley
internal MOSFET switch
VGATE
VD
0
0
IL
VOUT
magnetization
3
2
t1
t0
t00
t2
t3
T
4
1



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