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SPV1020 数据表(PDF) 5 Page - STMicroelectronics |
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SPV1020 数据表(HTML) 5 Page - STMicroelectronics |
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5 / 19 page ![]() SPV1020 Pin connection Doc ID 17588 Rev 3 5/19 Table 2. Pin description Pin Name Type Description PowerSSO-36 34 VIN Supply DC input power supply unit. 7,8,17,18,19,20,29,30 VOUT Supply Booster output voltage 12,13,24,25 PGND Ground Power ground 1SGND Ground Signal ground reference. The exposed pad is connected to PGND. 22,23,26,27,15,14,11,1 0 LX1…4 I Booster inductor connection. 9,16,21,28 CB1…4 I/O External bootstrap capacitors must be connected between these pins and LXi 5 VREG I/O Power supply for internal low voltage circuitry; an external capacitor must be connected to this pin referenced to SGND 35 VIN_SNS I Sense pin of input voltage. To be biased with a resistor divider between VIN and SGND 3VOUT_SNS I Sense pin of output voltage. To be biased with a resistor divider between VOUT and SGND 31 XCS I Activates the SPI 36 VIN_SNS_M I Dedicated ground for VIN_SNS 2 PZ_OUT I/O Compensates the output voltage feedback loop. A series resistor and capacitor are connected between PZ_OUT and SGND. 6 SPI_DATA_OUT O Data OUT for SPI interface 33 SPI_CLK I Clock for SPI interface. 32 SPI_DATA_IN I Data IN for SPI interface. 4OSC_IN I Pin for adjusting the switching frequency; to set the default value of 100 kHz, connect OSC_IN to VREG. Otherwise connect OSC_IN through a resistor to SGND. |
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