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STTS2002 数据表(PDF) 32 Page - STMicroelectronics |
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STTS2002 数据表(HTML) 32 Page - STMicroelectronics |
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32 / 52 page ![]() SPD EEPROM operation STTS2002 32/52 Doc ID 15389 Rev 5 5.4 Software write protect Software write-protection allows the bottom half of the memory area (addresses 00h to 7Fh) to be temporarily or permanently write protected. Software write-protection is handled by three instructions: ● SWP: set write protection ● CWP: clear write protection ● PSWP: permanently set write protection The level of write-protection (set or cleared) that has been defined using these instructions, remains defined even after a power cycle. Figure 10. Result of setting the write protection Table 24. Operating modes Mode RW bit Bytes Initial sequence Current address read 1 1 START, device select, RW = 1 Random address read 0 1 START, device select, RW = 0, address 1 reSTART, device select, RW = 1 Sequential read 1 ≥ 1 Similar to current or random address read Byte write 0 1 START, device select, RW = 0 Page write 0 ≤ 16 START, device select, RW = 0 TS write 0 2 START, device select, R/W = 0, pointer data, stop TS read 1 2 START, device select, R/W = 1, pointer data, stop Default EEPROM memory area state before write access to the Protect Register AI01936c Standard Array FFh Standard Array 80h 7Fh 00h Standard Array FFh Write Protected Array 80h 7Fh 00h State of the EEPROM memory area after write access to the Protect Register Memory Area |
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