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R5F5630ECDBG 数据表(PDF) 47 Page - Renesas Technology Corp

部件名 R5F5630ECDBG
功能描述  Renesas MCUs
PDF  165 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

R5F5630ECDBG 数据表(HTML) 47 Page - Renesas Technology Corp

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R01DS0060EJ0100 Rev.1.00
Page 47 of 168
Sep 13, 2011
RX630 Group
1. Overview
Note 1. Enabled only for the on-chip ROM capacity: 2 MB/1.5 MB
Note 2. The BCLK function is multiplexed with the I/O port function for pin P53, so the port function is not available if the external bus is
enabled.
N6
USB0_DP
N7
TRDATA3
P55
WAIT#
MTIOC4D
TMO3
CRX1
IRQ10
N8
VSS
N9
PC7
A23
CS0#
MTIOC3A
MTCLKB
TIOCB6
TMO2
PO31
TXD8
SMOSI8
SSDA8
MISOA
IRQ14
N10
TRSYNC#
P82
MTIOC4A
PO28
TXD10
SMOSI10
SSDA10
N11
PC3
A19
MTIOC4D
TCLKB
PO24
TXD5
SMOSI5
SSDA5
IETXD
N12
P75
CS5#
PO20
SCK11
N13
P74
CS4#
PO19
CTS11#
RTS11#
SS11#
Table 1.7
List of Pins and Pin Functions (145-Pin TFLGA) (7/7)
Pin Number
Power Supply
Clock System
Control
I/O Port
Bus
Timer
Communications
Interrupt
S12AD,
AD, DA
145-Pin
TFLGA
(MTU, TPU, TMR, PPG,
RTC, POE)
(SCIc, SCId, RSPI, RIIC,
CAN, IEB, USB)



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