R5F5630ECDBG datasheet(165/165 Pages) RENESAS

165 / 165 page

R01DS0060EJ0100 Rev.1.00

Page 165 of 168

Sep 13, 2011

RX630 Group

REVISION HISTORY

RX630 Group Datasheet

Rev.

Date

Description

Page

Summary

0.50

May 13, 2011

—

First Edition issued

1.00

Sep 13, 2011 All

1. Overview

2, 4, 6

Table 1.1 Outline of Specifications: Reset, real time clock, package, changed

8 to 9

Table 1.3 List of Products Table, changed

Table 1.4 List of Pin Functions: BSCANP pin, added

Figure 1.3 Pin Assignments (177-Pin TFLGA), added

Figure 1.4 Pin Assignments (176-Pin LFBGA), added

Figure 1.5 Pin Assignments (176-Pin LQFP): 16-pin and 18-pin, changed

Figure 1.6 Pin Assignments (145-Pin TFLGA), added

Figure 1.7 Pin Assignments (144-Pin LQFP): 16-pin, changed

Figure 1.8 Pin Assignments (100-Pin TFLGA), added

Figure 1.9 Pin Assignments (100-Pin LQFP): 7-pin, changed

25 to 32

Table 1.5 List of Pins and Pin Functions (177-Pin TFLGA, 176-Pin LFBGA), added

41 to 47

Table 1.7 List of Pins and Pin Functions (145-Pin TFLGA), added

55 to 59

Table 1.9 List of Pins and Pin Functions (100-Pin TFLGA), added

4. I/O Registers

(1) I/O Register Addresses (Address Order), changed

(3) Number of I/O Registers to Access Cycles, changed

77 to 116

Table 5.1 List of I/O Registers, changed

5. Electrical Characteristics

117 to 156

Added

Appendix 1. Port States in Each Processing Mode

157

Figure A. 177-Pin TFLGA (PTLG0177KA-A), added

158

Figure B. 176-Pin LFBGA (PLBG0176GA-A), added

160

Figure D. 145-Pin TFLGA (PTLG0145KA-A), added

162

Figure F. 100-Pin TFLGA (PTLG0100KA-A), added

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REVISION HISTORY

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