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SY100S341 数据表(PDF) 5 Page - Micrel Semiconductor |
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SY100S341 数据表(HTML) 5 Page - Micrel Semiconductor |
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5 / 6 page ![]() 5 SY100S341 Micrel, Inc. M9999-042307 hbwhelp@micrel.com or (408) 955-1690 TIMING DIAGRAMS Propagation Delay and Transition Times PARALLEL 20% 80% 50% tPLH tPHL tTLH tTHL 0.7 ± 0.1 ns 0.7 ± 0.1 ns –0.95V –1.69V CLOCK OUTPUT 1/fshift tpw (H) –0.95V –1.69V Set-up and Hold Times Notes: 1. VEE = –4.2V to –5.5V unless otherwise specified; VCC = VCCA = GND. 2. tS is the minimum time before the transition of the clock that information must be present at the data input. 3. tH is the minimum time after the transition of the clock that information must remain unchanged at the data input. CLOCK 50% –1.69V Pn, Sn, Dn tS 50% tH –0.95V –1.69V –0.95V |
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