TA7368P

LINEAR INTEGRATED CIRCUIT

UNISONICTECHNOLOGIESCO.,LTD

5 of 7

www.unisonic.com.tw

QW-R107-009,E

PRECAUTION FOR APPLICATION

1. Input stage (Figure 1)

The input stage of power amplifier is comprised of a PNP differential pair( Q2 and Q3) preceded by a PNP emitter

follower(Q1) which allows DC referencing of the source signal to GND. This eliminates the need for an input coupling

capacitor. However, in case the brush noise of volume becomes a problem, provide serially a coupling capacitor to

the input side.

2. Adjustment of the voltage gain (Figure 2)

The voltage gain is fixed at Gv=40dB by the resistors( R4 and R5) in IC. Its reduction is possible through adding Rf

as

shown

in

Figure

2.

In

this

case,

the

voltage

gain

is

obtained

by

the

following

equation:

Gv=20log(R5+R4+Rf)/(R4+Rf). It is recommended to use this IC with the voltage gain of Gv=28dB or over.

Figure 1

Figure

2

Figure 3

3. Ripple Rejection (Figure 3)

Adding Crip, to the ripple terminal 2 as shown in Figure 3, the ripple rejection ratio is improved from -25dB to -45dB.

4. Power dissipation

Casre should be taken to use IC below maximum power dissipation because it may be over maximum rating

depending on operating condition.

Pd=900mW (Ta=25

°C)

5. Phase-compensation

Small temperature coefficient and excellent frequency characteristics is needed by capacitor below:

*Oscillation preventing capacitor for power amplifier output

*Bypass capacitor for ripple filter

*Capacitor between Vcc and GND