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4051G-S16-R 数据表(PDF) 4 Page - Unisonic Technologies

部件名 4051G-S16-R
功能描述  8-CHANNEL ANALOG MULTIPLEXERS/DEMULTIPLEXERS
PDF  6 Pages
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制造商  UTC [Unisonic Technologies]
网页  http://www.utc-ic.com
标志 UTC - Unisonic Technologies

4051G-S16-R 数据表(HTML) 4 Page - Unisonic Technologies

  4051G-S16-R Datasheet HTML 1Page - Unisonic Technologies 4051G-S16-R Datasheet HTML 2Page - Unisonic Technologies 4051G-S16-R Datasheet HTML 3Page - Unisonic Technologies 4051G-S16-R Datasheet HTML 4Page - Unisonic Technologies 4051G-S16-R Datasheet HTML 5Page - Unisonic Technologies 4051G-S16-R Datasheet HTML 6Page - Unisonic Technologies  
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4051
CMOS IC
UNISONICTECHNOLOGIESCO.,LTD
4 of 6
www.unisonic.com.tw
QW-R502-054.C
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNIT
CONTROL INPUTS – INHIBIT A, B, C (Voltages Referenced to VSS)
Low Level Input Voltage
VDD=5V
VIL
RON= per spec,
IOFF = per spec
2.25
1.5
V
VDD=10V
4.50
3.0
VDD=15V
6.75
4.0
High Level Input Voltage
VDD=5V
VIH
RON= per spec,
IOFF = per spec
3.5
2.75
V
VDD=10V
7
5.5
VDD=15V
11
8.25
Input Leakage Current
ILEAK
VIN= 0 or VDD, VDD=15V
±0.00001
±0.1
µA
Input Capacitance
CIN
5.0
7.5
pF
DYNAMIC ELECTRICAL CHARACTERISTICS
(CL = 50pF, TA=25℃, VEE≦VSS, unless otherwise specified)
PARAMETER
SYMBOL
VDD-VEE
VDC
TEST CONDITIONS
MIN
TYP
MAX UNIT
Propagation Delay Times
Switch Input to Switch
Output (RL = 10kΩ)
tPLH, tPHL
5
tPLH, tPHL =(0.17 ns/pF)CL + 26.5ns
35
90
ns
10
tPLH, tPHL =(0.08 ns/pF)CL + 11ns
15
40
15
tPLH, tPHL =(0.06 ns/pF)CL + 9ns
12
30
Inhibit to Output
tPHZ, tPLZ
tPZH, tPZL
5
(RL=10kΩ, VEE=VSS)
Output “1” or “0” to High Impedance,
or High Impedance to “1” or “0” Level
350
700
ns
10
170
340
15
140
280
Control Input to Output
tPLH, tPHL
5
RL = 10kΩ, VEE = VSS
360
720
ns
10
160
320
15
120
240
Total Harmonic Distortion
THD
10
RL = 10KΩ, f = 1 kHz, Vin = 5 VPP
0.07
%
Bandwidth
BW
10
RL = 1kΩ, VIN = 1/2 (VDD–VEE) p–p,
CL = 50pF, 20 Log (VOUT/VIN) = -3dB)
17
MHz
Off Channel Feedthrough
Attenuation
10
RL=1KΩ, VIN = 1/2 (VDD–VEE) p–p
fIN = 4.5 MHz
-50
dB
Channel Separation
10
RL = 1kΩ, VIN = 1/2 (VDD–VEE) p–p
fIN = 3MHz
-50
dB
Crosstalk, Control Input to
Common O/I
10
R1 = 1kΩ, RL = 10kΩ Control
tTLH = tTHL = 20ns, Inhibit = VSS
75
mV
Note: 1. Data of “TYP” is intended as an indication of the IC’s potential performance.
2. For voltage drops across the switch(ΔVSW)>600mV (>300mV at high temperature), excessive VDD current
may be drawn, i.e. the current out of the switch may contain both VDD and switch input components. The
reliability of the device will be unaffected unless the Maximum Ratings are exceeded.



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