CD4541

CMOS IC

UNISONICTECHNOLOGIESCO.,LTD

5 of 7

www.unisonic.com.tw

QW-R502-037.C

OPERATING CHARACTERISTICS

With Auto Reset pin set to a “0” the counter circuit is initialized by turning on power. Or with power already on, the

counter circuit is reset when the Master Reset pin is set to a “1”. Both types of reset will result in synchronously

resetting all counter stages independent of counter state.

The RC oscillator frequency is determined by the external RC network, i.e.:

The time select inputs (A and B) provide a two-bit address to output any one of four counter stages (2

and 2

When A is “1”, 2

However, when B is “0”, normal counting is interrupted and the 9th counter stage receives its clock directly from

the oscillator (i.e., effectively outputting 2

The Q/Q select output control pin provides for a choice of output level. When the counter is in a reset condition

and Q/Q select pin is set to a “0” the Q output is a “0”. Correspondingly, when Q/Q select pin is set to a “1” the Q

output is a “1”.

When the mode control pin is set to a “1”, the selected count is continually transmitted to the output. But, with

mode pin “0” and after a reset condition the RS flip-flop resets (see Logic Diagram), counting commences and after

2

will not change. Thus, a Master Reset pulse must be applied or a change in the mode pin level is required to reset

the single cycle operation.

INTERNAL

RESET

21

TO CLOCK

CIRCUIT

Oscillator Circuit Using RC Configuration

3