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AD8426

Rev. 0 | Page 21 of 28

THEORY OF OPERATION

24.7kΩ

–IN

+IN

+VS

–VS

50kΩ

+VS

–VS

VOUT

REF

NODE 1

NODE 2

VBIAS

+VS

–VS

+VS

–VS

NODE 4

NODE 3

50kΩ

DIFFERENCE

AMPLIFIER STAGE

GAIN STAGE

ESD AND

OVERVOLTAGE

PROTECTION

ESD AND

OVERVOLTAGE

PROTECTION

–VS

Figure 61. Simplified Schematic

ARCHITECTURE

The AD8426 is based on the classic 3-op-amp topology. This

topology has two stages: a gain stage (preamplifier) to provide

differential amplification, followed by a difference amplifier stage

to remove the common-mode voltage. Figure 61 shows a simplified

schematic of one of the instrumentation amplifiers in the AD8426.

The first stage works as follows. To maintain a constant voltage

across the bias resistor, RB, A1 must keep Node 3 at a constant

diode drop above the positive input voltage. Similarly, A2 keeps

Node 4 at a constant diode drop above the negative input voltage.

Therefore, a replica of the differential input voltage is placed

across the gain setting resistor, RG. The current that flows across

this resistance must also flow through the R1 and R2 resistors,

creating a gained differential signal between the A2 and A1 out-

puts. Note that, in addition to a gained differential signal, the

original common-mode signal, shifted up by a diode drop, is

also still present.

The second stage is a difference amplifier, composed of A3 and

four 50 kΩ resistors. The purpose of this stage is to remove the

common-mode signal from the amplified differential signal.

The transfer function of the AD8426 is

VOUT = G × (VIN+ − VIN−) + VREF

where:

kΩ

49.4

1 +

GAIN SELECTION

Placing a resistor across the RG terminals sets the gain of the

AD8426. The gain can be calculated by referring to Table 11

or by using the following gain equation:

kΩ

49.4

−

Table 11. Gains Achieved Using 1% Resistors

1% Standard Table Value of RG

Calculated Gain

49.9 kΩ

1.990

12.4 kΩ

4.984

5.49 kΩ

9.998

2.61 kΩ

19.93

1.00 kΩ

50.40

499 Ω

100.0

249 Ω

199.4

100 Ω

495.0

49.9 Ω

991.0

The AD8426 defaults to G = 1 when no gain resistor is used.

The tolerance and gain drift of the RG resistor should be added

to the AD8426 specifications to determine the total gain accu-

racy of the system. When the gain resistor is not used, gain

error and gain drift are minimal.

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