AD8436

Rev. 0 | Page 5 of 20

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

16

20

15

10

6

AD8436

TOP VIEW

(Not to Scale)

11

PIN 1

INDICATOR

VEE

CAVG

VCC

OBUFOUT

IGND

OBUFIN+

OBUFIN–

OBUFV+

OUT

DNC

NOTES

1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.

2. THE EXPOSED PAD SHOULD NOT BE CONNECTED.

IBUFGN

DNC

IBUFOUT

IBUFIN+

SUM

IBUFV+

RMS

CCF

OGND

IBUFIN–

1

5

Figure 3. Pin Configuration, Top View

Table 4. Pin Function Descriptions

Pin No.

Mnemonic

Description

1

DNC

Do Not Connect. Used for factory test.

2

RMS

AC Input to the RMS Core.

3

IBUFOUT

Output Connection for the FET Input Buffer Amplifier.

4

IBUFIN–

Inverting Input to the FET Input Buffer Amplifier.

5

IBUFIN+

Noninverting Input to the FET Input Buffer Amplifier.

6

IBUFGN

Optional 10 kΩ Precision Gain Resistor.

7

DNC

Do Not Connect. Used for factory test.

8

OGND

Internal 16 kΩ Current-to-Voltage Resistor. Connect to ground for voltage output at Pin 9; leave unconnected

for current output at Pin 9.

9

OUT

Voltage or Current Output of the RMS Core.

10

VEE

Negative Supply Rail.

11

IGND

Half Supply Node. Leave open for single-supply operation.

12

OBUFIN+

Noninverting Input of the Optional Precision Output Buffer. OBUFIN+ is typically connected to OUT.

13

OBUFIN−

Inverting Input of the Optional Precision Output Buffer. OBUFIN− is typically connected to OBUFOUT.

14

OBUFOUT

Low Impedance Output for ADC or Other Loads.

15

OBUFV+

Power Pin for the Output Buffer.

16

IBUFV+

Power Pin for the Input Buffer.

17

VCC

Positive Supply Rail for the RMS Core.

18

CCF

Connection for Crest Factor Capacitor.

19

CAVG

Connection for Averaging Capacitor.

20

SUM

Summing Amplifier Input Node. An external resistor can be connected for custom scaling.

EP

DNC

Exposed Pad. The exposed pad should not be connected.