Data Sheet

ADMP521

Rev. A | Page 9 of 16

CONNECTING PDM MICROPHONES

A PDM output microphone is typically connected to a codec with

a dedicated PDM input. This codec separately decodes the left

and right channels and filters the high sample rate modulated data

back to the audio frequency band. This codec also generates the

clock for the PDM microphones or is synchronous with the source

that is generating the clock. See the Applications Information

section for additional details on connecting the ADMP521 to

Analog Devices, Inc., audio codecs with a PDM input. Figure 11

and Figure 12 show mono and stereo connections of the

ADMP521 and a codec. The mono connection shows an

ADMP521 set to output data on the right channel. To output on

CLOCK OUTPUT

CODEC

0.1µF

1.8V TO 3.3V

GND

L/R SELECT

DATA

ADMP521

CLK

DATA INPUT

Figure 11. Mono PDM Microphone (Right Channel) Connection to Codec

CLOCK OUTPUT

CODEC

0.1µF

1.8V TO 3.3V

GND

L/R SELECT

DATA

ADMP521

CLK

DATA INPUT

0.1µF

1.8V TO 3.3V

GND

L/R SELECT

DATA

ADMP521

CLK

Figure 12. Stereo PDM Microphone Connection to Codec

board (PCB) layout allows.

Do not use a pull-up or pull-down resistor on the PDM data signal

line because it can pull the signal to an incorrect state during the

period that the signal line is tristated.

The DATA signal does not need to be buffered in normal use when

the ADMP521 microphone(s) is placed close to the codec on the

PCB. If the ADMP521 needs to drive the DATA signal over a long

cable (>15 cm) or other large capacitive load, a digital buffer may

be needed. Only use a signal buffer on the DATA line when one

microphone is in use or after the point where two microphones

have been connected (see Figure 13). The DATA output of each

microphone in a stereo configuration cannot be individually

buffered because the two buffer outputs cannot drive a single signal

line. If a buffer is used, take care to select one with low propagation

delay so that the timing of the data connected to the codec is not

corrupted.

When long wires are used to connect the codec to the ADMP521,

a 100 Ω source termination resistor may be used on the clock

output of the codec instead of a buffer to minimize signal over-

shoot or ringing. Depending on the drive capability of the codec

clock output, a buffer may still be needed, as shown in Figure 13.

CLOCK OUTPUT

CODEC

DATA

ADMP521

ADMP521

CLK

DATA INPUT

DATA

CLK

Figure 13. Buffered Connection Between Stereo ADMP521s and a Codec

SLEEP MODE

The microphone enters sleep mode when the clock frequency falls

below 1 kHz. In this mode, the microphone data output is in a

high impedance state. The current consumption in sleep mode

is less than 1 µA.

The ADMP521 enters sleep mode within 1 ms of the clock

frequency falling below 1 kHz. The microphone wakes up from

sleep mode in 32,768 cycles after the clock becomes active. With a

3.072 MHz clock, the microphone wake time is 10.7 ms; for a

2.4 MHz clock, the microphone wake time is 13.7 ms.

START-UP

The start-up time of the ADMP521 from when the clock is

active is the same time as the waking from sleep time. The

microphone starts up 32,768 cycles after the clock is active.