DM9161CIEP datasheet(17/47 Pages) DAVICOM

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DM9161CI

10/100 Mbps Fast Ethernet Physical Layer Single Chip Transceiver

Final

Version: DM9161CI-DS-F01

February 22, 2012

The block diagram in figure 7-3 provides an overview of the

functional blocks contained in the transmit section.

The transmitter section contains the following functional

blocks:

- 4B5B Encoder

- Scrambler

- Parallel to Serial Converter

- NRZ to NRZI Encoder

- NRZI to MLT-3

- MLT-3 Driver

7.2.1.1 4B5B Encoder

The 4B5B encoder converts 4-bit (4B) nibble data

generated by the MAC Reconciliation Layer into a 5-bit (5B)

code group for transmission, see reference Table 7-1. This

conversion is required for control and packet data to be

combined in code groups. The 4B5B encoder substitutes

the first 8 bits of the MAC preamble with a J/K code group

pair (11000 10001) upon transmit. The 4B5B encoder

continues to replace subsequent 4B preamble and data

nibbles with corresponding 5B code-groups. At the end of

the transmit packet, upon the deassertion of the Transmit

Enable signal from the MAC Reconciliation layer, the 4B5B

encoder injects the T/R code group pair (01101 00111)

indicating end of frame. After the T/R code group pair, the

4B5B encoder continuously injects IDLEs into the transmit

data stream until Transmit Enable is asserted and the next

transmit packet is detected.

The DM9161CI includes a Bypass 4B5B conversion option

within the 100Base-TX Transmitter for support of

applications like 100 Mbps repeaters, which do not require

4B5B conversion.

7.2.1.2 Scrambler

The scrambler is required to control the radiated emissions

(EMI) by spreading the transmit energy across the

frequency spectrum at the media connector and on the

twisted pair cable in 100Base-TX operation.

By scrambling the data, the total energy presented to the

cable is randomly distributed over a wide frequency range.

Without the scrambler, energy levels on the cable could

peak beyond FCC limitations at frequencies related to

repeated 5B sequences like continuous transmission of

IDLE symbols. The scrambler output is combined with the

NRZ 5B data from the code group encoder via an XOR

logic function. The result is a scrambled data stream with

sufficient randomization to decrease radiated emissions at

critical frequencies.

7.2.1.3 Parallel to Serial Converter

The Parallel to Serial Converter receives parallel 5B

scrambled data from the scrambler and serializes it

(converts it from a parallel to a serial data stream).

The serialized data stream is then presented to the

NRZ to NRZI encoder block

7.2.1.4 NRZ to NRZI Encoder

Since the transmit data stream has been scrambled and

serialized, the data must be NRZI encoded for compatibility

with the TP-PMD standard for 100Base-TX transmission

over Category-5 unshielded twisted pair cable.

7.2.1.5 MLT-3 Converter

The MLT-3 conversion is accomplished by converting the

data stream output from the NRZI encoder into two binary

data streams with alternately phased logic one events.

7.2.1.6 MLT-3 Driver

The two binary data streams, created at the MLT-3

converter, are fed to the twisted pair output driver, which

converts these streams to current sources and alternately

drives either side of the transmit transformer’s primary

winding, resulting in a minimal current MLT-3 signal. Refer to

figure 7-4 for the block diagram of the MLT-3 converter.

DM9161CIEP 数据表(PDF) 17 Page - Davicom Semiconductor, Inc.

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