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TPS2002C 数据表(PDF) 2 Page - Texas Instruments |
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TPS2002C 数据表(HTML) 2 Page - Texas Instruments |
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2 / 25 page ![]() TPS2062C, TPS2066C TPS2060C, TPS2064C TPS2002C, TPS2003C SLVSAX6C – OCTOBER 2011 – REVISED JUNE 2012 www.ti.com This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. DEVICE INFORMATION(1)(2) PACKAGE DEVICES(3) MAXIMUM OUTPUT BASE PART MSOP-8 OPERATING ENABLE MARKING SOIC-8 SON-10 DISCHARGE NUMBER (DGN) CURRENT (D) (DRC) PowerPAD™ 1 Low Y TPS2062C √ √ – VRBQ 1 High Y TPS2066C √ √ – VRDQ 1.5 Low Y TPS2060C – √ – VRAQ 1.5 High Y TPS2064C – √ – VRCQ 2 Low Y TPS2002C – – √ VREQ 2 High Y TPS2003C – – √ VRFQ (1) For the most current packaging and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. (2) Package code for MSOP-8 is “DGN” and for SON is “DRC”. (3) “–” indicates the device is not available in this package. ABSOLUTE MAXIMUM RATINGS (1) (2) VALUE UNIT MIN MAX Voltage range on IN, OUTx, ENx or ENx, FLTx(3) –0.3 6 V Voltage range from IN to OUT –6 6 V Maximum junction temperature, TJ Internally Limited °C Human Body Model 2 kV ESD Charged Device Model 500 V IEC 61000-4-2, Contact / Air(4) 8 / 15 kV (1) Absolute maximum ratings apply over recommended junction temperature range. (2) All voltages are with respect to GND unless otherwise noted. (3) See INPUT AND OUTPUT CAPACITANCE section. (4) VOUT was surged on a PCB with input and output bypassing per Figure 1 (except input capacitor was 22 µF) with no device failure. THERMAL INFORMATION D DGN DRC THERMAL METRIC(1)(2) UNITS 8 PINS 8 PINS 10 PINS θJA Junction-to-ambient thermal resistance 129.9 57.2 45.4 θJCtop Junction-to-case (top) thermal resistance 83.5 110.5 58 θJB Junction-to-board thermal resistance 70.4 60.7 21.1 °C/W ψJT Junction-to-top characterization parameter 36.6 7.8 1.9 ψJB Junction-to-board characterization parameter 66.9 24 21.3 θJCbot Junction-to-case (bottom) thermal resistance n/a 14.3 9.1 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. (2) For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator. 2 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): TPS2062C TPS2066C TPS2060C TPS2064C TPS2002C TPS2003C |
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